From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Tue, 14 Oct 2008 21:24:42 +0000 (+0100)
Subject: Merge branch 'omap-all' into devel
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b6825d2df55aa7d7341c715b577b73a6a03dc944;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

Merge branch 'omap-all' into devel

Conflicts:

	arch/arm/mach-omap2/gpmc.c
	arch/arm/mach-omap2/irq.c
---

b6825d2df55aa7d7341c715b577b73a6a03dc944
diff --cc arch/arm/mach-omap2/clock.c
index 97cde3d3611d,57c4405cceda..ad721e0cbf7a
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@@ -21,10 -21,12 +21,11 @@@
  #include <linux/errno.h>
  #include <linux/delay.h>
  #include <linux/clk.h>
 -#include <asm/bitops.h>
 -
 -#include <asm/io.h>
 +#include <linux/io.h>
 +#include <linux/bitops.h>
  
  #include <mach/clock.h>
+ #include <mach/clockdomain.h>
  #include <mach/sram.h>
  #include <mach/cpu.h>
  #include <asm/div64.h>
diff --cc arch/arm/mach-omap2/gpmc.c
index af1081a0b27c,375ad27479cc..763bdbeaf681
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@@ -15,8 -17,9 +17,9 @@@
  #include <linux/clk.h>
  #include <linux/ioport.h>
  #include <linux/spinlock.h>
 +#include <linux/io.h>
+ #include <linux/module.h>
  
 -#include <asm/io.h>
  #include <asm/mach-types.h>
  #include <mach/gpmc.h>
  
diff --cc arch/arm/mach-omap2/id.c
index 209177c7f22f,0670c8db010a..bf45ff39a7b5
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@@ -14,10 -14,10 +14,11 @@@
  #include <linux/module.h>
  #include <linux/kernel.h>
  #include <linux/init.h>
 +#include <linux/io.h>
  
 -#include <asm/io.h>
 +#include <asm/cputype.h>
  
+ #include <mach/common.h>
  #include <mach/control.h>
  #include <mach/cpu.h>
  
diff --cc arch/arm/plat-omap/devices.c
index b38410f26203,6467f57a2ac1..25232b281e1e
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@@ -20,8 -20,8 +20,9 @@@
  #include <asm/mach/map.h>
  
  #include <mach/tc.h>
+ #include <mach/control.h>
  #include <mach/board.h>
 +#include <mach/mmc.h>
  #include <mach/mux.h>
  #include <mach/gpio.h>
  #include <mach/menelaus.h>
diff --cc arch/arm/plat-omap/include/mach/gpio.h
index 8c71e288860f,5bb7460cabc4..98e9008b7e9d
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@@ -26,10 -26,10 +26,10 @@@
  #ifndef __ASM_ARCH_OMAP_GPIO_H
  #define __ASM_ARCH_OMAP_GPIO_H
  
 +#include <linux/io.h>
  #include <mach/irqs.h>
 -#include <asm/io.h>
  
- #define OMAP_MPUIO_BASE			(void __iomem *)0xfffb5000
+ #define OMAP_MPUIO_BASE			0xfffb5000
  
  #ifdef CONFIG_ARCH_OMAP730
  #define OMAP_MPUIO_INPUT_LATCH		0x00
diff --cc arch/arm/plat-omap/include/mach/irqs.h
index 62aa7dfb9464,ed1c1253b666..a2929ac8c687
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@@ -278,10 -286,59 +286,61 @@@
  #define INT_24XX_USB_IRQ_HGEN	78
  #define INT_24XX_USB_IRQ_HSOF	79
  #define INT_24XX_USB_IRQ_OTG	80
+ #define INT_24XX_MCBSP5_IRQ_TX	81
+ #define INT_24XX_MCBSP5_IRQ_RX	82
  #define INT_24XX_MMC_IRQ	83
+ #define INT_24XX_MMC2_IRQ	86
+ #define INT_24XX_MCBSP3_IRQ_TX	89
+ #define INT_24XX_MCBSP3_IRQ_RX	90
+ #define INT_24XX_SPI3_IRQ	91
+ 
+ #define INT_243X_MCBSP2_IRQ	16
+ #define INT_243X_MCBSP3_IRQ	17
+ #define INT_243X_MCBSP4_IRQ	18
+ #define INT_243X_MCBSP5_IRQ	19
+ #define INT_243X_MCBSP1_IRQ	64
+ #define INT_243X_HS_USB_MC	92
+ #define INT_243X_HS_USB_DMA	93
+ #define INT_243X_CARKIT_IRQ	94
+ 
+ #define INT_34XX_BENCH_MPU_EMUL	3
+ #define INT_34XX_ST_MCBSP2_IRQ	4
+ #define INT_34XX_ST_MCBSP3_IRQ	5
+ #define INT_34XX_SSM_ABORT_IRQ	6
+ #define INT_34XX_SYS_NIRQ	7
+ #define INT_34XX_D2D_FW_IRQ	8
+ #define INT_34XX_PRCM_MPU_IRQ	11
+ #define INT_34XX_MCBSP1_IRQ	16
+ #define INT_34XX_MCBSP2_IRQ	17
+ #define INT_34XX_MCBSP3_IRQ	22
+ #define INT_34XX_MCBSP4_IRQ	23
+ #define INT_34XX_CAM_IRQ	24
+ #define INT_34XX_MCBSP5_IRQ	27
+ #define INT_34XX_GPIO_BANK1	29
+ #define INT_34XX_GPIO_BANK2	30
+ #define INT_34XX_GPIO_BANK3	31
+ #define INT_34XX_GPIO_BANK4	32
+ #define INT_34XX_GPIO_BANK5	33
+ #define INT_34XX_GPIO_BANK6	34
+ #define INT_34XX_USIM_IRQ	35
+ #define INT_34XX_WDT3_IRQ	36
+ #define INT_34XX_SPI4_IRQ	48
+ #define INT_34XX_SHA1MD52_IRQ	49
+ #define INT_34XX_FPKA_READY_IRQ	50
+ #define INT_34XX_SHA1MD51_IRQ	51
+ #define INT_34XX_RNG_IRQ	52
+ #define INT_34XX_I2C3_IRQ	61
+ #define INT_34XX_FPKA_ERROR_IRQ	64
+ #define INT_34XX_PBIAS_IRQ	75
+ #define INT_34XX_OHCI_IRQ	76
+ #define INT_34XX_EHCI_IRQ	77
+ #define INT_34XX_TLL_IRQ	78
+ #define INT_34XX_PARTHASH_IRQ	79
+ #define INT_34XX_MMC3_IRQ	94
+ #define INT_34XX_GPT12_IRQ	95
  
 +#define	INT_34XX_BENCH_MPU_EMUL	3
 +
  /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
   * 16 MPUIO lines */
  #define OMAP_MAX_GPIO_LINES	192