From: Olof Johansson Date: Tue, 11 Jun 2013 07:31:14 +0000 (-0700) Subject: Merge tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b67172ec0043bdc122aca334164979bd001450b6;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git Merge tag 'renesas-soc-for-v3.11' of git://git./linux/kernel/git/horms/renesas into next/soc From Simon Horman: Renesas ARM-based SoC updates for v3.11 * Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790 * Use fixed clock ratio for r8a7778 * Always use shmobile_setup_delay for sh73a0 * Add add CPUFreq support for sh73a0 * Check kick bit before changing rate on sh73a0 * Do not overwrite all div4 clock operations on sh73a0 * Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros * sh73a0: Use DEFINE_RES_MEM*() everywhere * r8a7740: Make private clock arrays static * r8a7778: Correct model number The last four changes listed above are cleanups. I have included them in this series as all bar the last one are dependencies of non-cleanup patches. * tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (27 commits) ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate ARM: shmobile: sh73a0: do not overwrite all div4 clock operations ARM: shmobile: sh73a0: Always use shmobile_setup_delay() ARM: shmobile: sh73a0: add CPUFreq support ARM: shmobile: sh73a0: add support for adjusting CPU frequency ARM: shmobile: r8a7790: add TPU PWM support ARM: shmobile: r8a7790: Make private clock arrays static ARM: shmobile: r8a7790: add div6 clocks ARM: shmobile: r8a7790: add div4 clocks ARM: shmobile: r8a7790: add main clock ARM: shmobile: r8a7778: Register SDHI device ARM: shmobile: r8a7778: add SDHI clock support ARM: shmobile: r8a7778: use fixed ratio clock ARM: shmobile: r8a7779: Add PCIe clocks ARM: shmobile: r8a73a4: add div6 clocks ARM: shmobile: r8a73a4: add div4 clocks ARM: shmobile: r8a73a4: add pll clocks ARM: shmobile: r8a73a4: add main clock ARM: shmobile: r8a7740: add TPU PWM support ARM: shmobile: r8a7740: Add I2C DT clock names ... Conflicts: arch/arm/mach-shmobile/Kconfig arch/arm/mach-shmobile/include/mach/r8a7778.h arch/arm/mach-shmobile/setup-r8a7778.c --- b67172ec0043bdc122aca334164979bd001450b6 diff --cc arch/arm/mach-shmobile/Kconfig index 06da4d36bc7c,f871f2a65e73..5414402938a5 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@@ -36,8 -36,7 +36,8 @@@ config ARCH_R8A774 select RENESAS_INTC_IRQPIN config ARCH_R8A7778 - bool "R-Car M1 (R8A77780)" + bool "R-Car M1A (R8A77781)" + select ARCH_WANT_OPTIONAL_GPIOLIB select CPU_V7 select SH_CLK_CPG select ARM_GIC diff --cc arch/arm/mach-shmobile/include/mach/r8a7778.h index 68053fc4d9dc,b5173b3428ac..ae65b459483f --- a/arch/arm/mach-shmobile/include/mach/r8a7778.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h @@@ -28,6 -29,6 +29,7 @@@ extern void r8a7778_init_irq(void) extern void r8a7778_init_irq_dt(void); extern void r8a7778_clock_init(void); extern void r8a7778_init_irq_extpin(int irlm); +extern void r8a7778_pinmux_init(void); + extern void r8a7778_sdhi_init(int id, struct sh_mobile_sdhi_info *info); #endif /* __ASM_R8A7778_H__ */ diff --cc arch/arm/mach-shmobile/setup-r8a7778.c index 1f36ecc322a3,f5b2a57a330e..1b9b7f2a5016 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c @@@ -95,50 -88,42 +89,88 @@@ static struct sh_timer_config sh_tmu1_p &sh_tmu##idx##_platform_data, \ sizeof(sh_tmu##idx##_platform_data)) + /* Ether */ + static struct resource ether_resources[] = { + DEFINE_RES_MEM(0xfde00000, 0x400), + DEFINE_RES_IRQ(gic_iid(0x89)), + }; + + void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) + { + platform_device_register_resndata(&platform_bus, "sh_eth", -1, + ether_resources, + ARRAY_SIZE(ether_resources), + pdata, sizeof(*pdata)); + } + +/* PFC/GPIO */ +static struct resource pfc_resources[] = { + DEFINE_RES_MEM(0xfffc0000, 0x118), +}; + +#define R8A7778_GPIO(idx) \ +static struct resource r8a7778_gpio##idx##_resources[] = { \ + DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \ + DEFINE_RES_IRQ(gic_iid(0x87)), \ +}; \ + \ +static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \ + .gpio_base = 32 * (idx), \ + .irq_base = GPIO_IRQ_BASE(idx), \ + .number_of_pins = 32, \ + .pctl_name = "pfc-r8a7778", \ +} + +R8A7778_GPIO(0); +R8A7778_GPIO(1); +R8A7778_GPIO(2); +R8A7778_GPIO(3); +R8A7778_GPIO(4); + +#define r8a7778_register_gpio(idx) \ + platform_device_register_resndata( \ + &platform_bus, "gpio_rcar", idx, \ + r8a7778_gpio##idx##_resources, \ + ARRAY_SIZE(r8a7778_gpio##idx##_resources), \ + &r8a7778_gpio##idx##_platform_data, \ + sizeof(r8a7778_gpio##idx##_platform_data)) + +void __init r8a7778_pinmux_init(void) +{ + platform_device_register_simple( + "pfc-r8a7778", -1, + pfc_resources, + ARRAY_SIZE(pfc_resources)); + + r8a7778_register_gpio(0); + r8a7778_register_gpio(1); + r8a7778_register_gpio(2); + r8a7778_register_gpio(3); + r8a7778_register_gpio(4); ++}; ++ + /* SDHI */ + static struct resource sdhi_resources[] = { + /* SDHI0 */ + DEFINE_RES_MEM(0xFFE4C000, 0x100), + DEFINE_RES_IRQ(gic_iid(0x77)), + /* SDHI1 */ + DEFINE_RES_MEM(0xFFE4D000, 0x100), + DEFINE_RES_IRQ(gic_iid(0x78)), + /* SDHI2 */ + DEFINE_RES_MEM(0xFFE4F000, 0x100), + DEFINE_RES_IRQ(gic_iid(0x76)), + }; + + void __init r8a7778_sdhi_init(int id, + struct sh_mobile_sdhi_info *info) + { + BUG_ON(id < 0 || id > 2); + + platform_device_register_resndata( + &platform_bus, "sh_mobile_sdhi", id, + sdhi_resources + (2 * id), 2, + info, sizeof(*info)); } void __init r8a7778_add_standard_devices(void)