From: Alex Deucher <alexander.deucher@amd.com>
Date: Thu, 9 Jun 2016 21:22:56 +0000 (-0400)
Subject: drm/amdgpu/gfx7: fix CP jump table size
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b58bc5598acc7df83788cc772d8b1a12f0913783;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

drm/amdgpu/gfx7: fix CP jump table size

Align to the jump table offset.  May fix hangs on some
asics with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index e718db24a420..be344820b884 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -3221,7 +3221,7 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
 		}
 	}
 	adev->gfx.rlc.cs_data = ci_cs_data;
-	adev->gfx.rlc.cp_table_size = CP_ME_TABLE_SIZE * 5 * 4; /* CP JT */
+	adev->gfx.rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */
 	adev->gfx.rlc.cp_table_size += 64 * 1024; /* GDS */
 
 	src_ptr = adev->gfx.rlc.reg_list;