From: Thomas Gleixner Date: Mon, 15 Oct 2007 21:28:20 +0000 (+0200) Subject: x86: unify include/asm/cacheflush_32/64.h X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b2bba72c10cdd907f73c57c8bdeb3354f8c233c6;p=GitHub%2FLineageOS%2FG12%2Fandroid_kernel_amlogic_linux-4.9.git x86: unify include/asm/cacheflush_32/64.h Same file, except for whitespace, comment formatting and the extra DEBUG_PAGE_ALLOC function in _32. Signed-off-by: Thomas Gleixner --- diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h index e2df3b55034a..b3d43de44c59 100644 --- a/include/asm-x86/cacheflush.h +++ b/include/asm-x86/cacheflush.h @@ -1,5 +1,40 @@ -#ifdef CONFIG_X86_32 -# include "cacheflush_32.h" -#else -# include "cacheflush_64.h" +#ifndef _ASM_X86_CACHEFLUSH_H +#define _ASM_X86_CACHEFLUSH_H + +/* Keep includes the same across arches. */ +#include + +/* Caches aren't brain-dead on the intel. */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) +#define flush_cache_range(vma, start, end) do { } while (0) +#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) +#define flush_dcache_page(page) do { } while (0) +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) +#define flush_icache_range(start, end) do { } while (0) +#define flush_icache_page(vma,pg) do { } while (0) +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) + +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + memcpy(dst, src, len) +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ + memcpy(dst, src, len) + +void global_flush_tlb(void); +int change_page_attr(struct page *page, int numpages, pgprot_t prot); +int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot); + +#ifdef CONFIG_DEBUG_PAGEALLOC +/* internal debugging function */ +void kernel_map_pages(struct page *page, int numpages, int enable); +#endif + +#ifdef CONFIG_DEBUG_RODATA +void mark_rodata_ro(void); +#endif + #endif diff --git a/include/asm-x86/cacheflush_32.h b/include/asm-x86/cacheflush_32.h deleted file mode 100644 index 74e03c8f2e51..000000000000 --- a/include/asm-x86/cacheflush_32.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef _I386_CACHEFLUSH_H -#define _I386_CACHEFLUSH_H - -/* Keep includes the same across arches. */ -#include - -/* Caches aren't brain-dead on the intel. */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -void global_flush_tlb(void); -int change_page_attr(struct page *page, int numpages, pgprot_t prot); - -#ifdef CONFIG_DEBUG_PAGEALLOC -/* internal debugging function */ -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif - -#ifdef CONFIG_DEBUG_RODATA -void mark_rodata_ro(void); -#endif - -#endif /* _I386_CACHEFLUSH_H */ diff --git a/include/asm-x86/cacheflush_64.h b/include/asm-x86/cacheflush_64.h deleted file mode 100644 index ab1cb5c7dc92..000000000000 --- a/include/asm-x86/cacheflush_64.h +++ /dev/null @@ -1,35 +0,0 @@ -#ifndef _X8664_CACHEFLUSH_H -#define _X8664_CACHEFLUSH_H - -/* Keep includes the same across arches. */ -#include - -/* Caches aren't brain-dead on the intel. */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -void global_flush_tlb(void); -int change_page_attr(struct page *page, int numpages, pgprot_t prot); -int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot); - -#ifdef CONFIG_DEBUG_RODATA -void mark_rodata_ro(void); -#endif - -#endif /* _X8664_CACHEFLUSH_H */