From: Maciej W. Rozycki Date: Thu, 25 Sep 2014 10:06:45 +0000 (+0100) Subject: defxx: DEFEA's Burst Holdoff register initialization fix X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=b1a6d3ecf806457d3e76ac0044db424be3c9422d;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git defxx: DEFEA's Burst Holdoff register initialization fix Use the mask rather than bit number macro to initialize the chip select control bit for PDQ register space decoding in the Burst Holdoff register. Signed-off-by: Maciej W. Rozycki Signed-off-by: David S. Miller --- diff --git a/drivers/net/fddi/defxx.c b/drivers/net/fddi/defxx.c index 6068db874281..15a18fbe30cf 100644 --- a/drivers/net/fddi/defxx.c +++ b/drivers/net/fddi/defxx.c @@ -748,9 +748,9 @@ static void dfx_bus_init(struct net_device *dev) */ val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF); if (dfx_use_mmio) - val |= PI_BURST_HOLDOFF_V_MEM_MAP; + val |= PI_BURST_HOLDOFF_M_MEM_MAP; else - val &= ~PI_BURST_HOLDOFF_V_MEM_MAP; + val &= ~PI_BURST_HOLDOFF_M_MEM_MAP; outb(val, base_addr + PI_DEFEA_K_BURST_HOLDOFF); /* Enable interrupts at EISA bus interface chip (ESIC) */