From: Ville Syrjälä Date: Thu, 30 Oct 2014 17:43:03 +0000 (+0200) Subject: drm/i915: Reinit display irqs and hpd from chv pipe-a power well X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=afd6275dd12381a7bd3750c125b3b68b5f8b03ca;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: Reinit display irqs and hpd from chv pipe-a power well On chv the pipe-a power well is the new disp2d well, and it kills pretty much everything in the display block. So we need to do the the same dance that vlv does wrt. display irqs and hpd when the power well goes up or down. Signed-off-by: Ville Syrjälä Reviewed-by: Paulo Zanoni Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index dcbecffc6b5f..f5a78d53e297 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -577,6 +577,23 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv, power_well->data != PIPE_C); chv_set_pipe_power_well(dev_priv, power_well, true); + + if (power_well->data == PIPE_A) { + spin_lock_irq(&dev_priv->irq_lock); + valleyview_enable_display_irqs(dev_priv); + spin_unlock_irq(&dev_priv->irq_lock); + + /* + * During driver initialization/resume we can avoid restoring the + * part of the HW/SW state that will be inited anyway explicitly. + */ + if (dev_priv->power_domains.initializing) + return; + + intel_hpd_init(dev_priv); + + i915_redisable_vga_power_on(dev_priv->dev); + } } static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, @@ -586,6 +603,12 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, power_well->data != PIPE_B && power_well->data != PIPE_C); + if (power_well->data == PIPE_A) { + spin_lock_irq(&dev_priv->irq_lock); + valleyview_disable_display_irqs(dev_priv); + spin_unlock_irq(&dev_priv->irq_lock); + } + chv_set_pipe_power_well(dev_priv, power_well, false); if (power_well->data == PIPE_A)