From: Daniel H. Hemmingsen Date: Thu, 12 Nov 2015 16:03:18 +0000 (+0100) Subject: Staging: comedi: Fixed multiple commenting and spacing codig style issues. X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=af904c49422be93dd182d45d0c9c3d1862ab72b0;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git Staging: comedi: Fixed multiple commenting and spacing codig style issues. Fixed multiple comment blocks that didn't comply with the kernels coding style, and fixed a few spacing issues as well. Signed-off-by: Daniel H. Hemmingsen Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h index 66edda190b75..83bd309d011b 100644 --- a/drivers/staging/comedi/comedi.h +++ b/drivers/staging/comedi/comedi.h @@ -1,20 +1,20 @@ /* - include/comedi.h (installed as /usr/include/comedi.h) - header file for comedi - - COMEDI - Linux Control and Measurement Device Interface - Copyright (C) 1998-2001 David A. Schleef - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU Lesser General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. -*/ + * include/comedi.h (installed as /usr/include/comedi.h) + * header file for comedi + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 1998-2001 David A. Schleef + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ #ifndef _COMEDI_H #define _COMEDI_H @@ -28,9 +28,9 @@ #define COMEDI_MAJOR 98 /* - maximum number of minor devices. This can be increased, although - kernel structures are currently statically allocated, thus you - don't want this to be much more than you actually use. + * maximum number of minor devices. This can be increased, although + * kernel structures are currently statically allocated, thus you + * don't want this to be much more than you actually use. */ #define COMEDI_NDEVICES 16 @@ -63,21 +63,21 @@ /* packs and unpacks a channel/range number */ #define CR_PACK(chan, rng, aref) \ - ((((aref)&0x3)<<24) | (((rng)&0xff)<<16) | (chan)) + ((((aref) & 0x3) << 24) | (((rng) & 0xff) << 16) | (chan)) #define CR_PACK_FLAGS(chan, range, aref, flags) \ (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK)) -#define CR_CHAN(a) ((a)&0xffff) -#define CR_RANGE(a) (((a)>>16)&0xff) -#define CR_AREF(a) (((a)>>24)&0x03) +#define CR_CHAN(a) ((a) & 0xffff) +#define CR_RANGE(a) (((a) >> 16) & 0xff) +#define CR_AREF(a) (((a) >> 24) & 0x03) #define CR_FLAGS_MASK 0xfc000000 -#define CR_ALT_FILTER (1<<26) +#define CR_ALT_FILTER (1 << 26) #define CR_DITHER CR_ALT_FILTER #define CR_DEGLITCH CR_ALT_FILTER -#define CR_ALT_SOURCE (1<<27) -#define CR_EDGE (1<<30) -#define CR_INVERT (1<<31) +#define CR_ALT_SOURCE (1 << 27) +#define CR_EDGE (1 << 30) +#define CR_INVERT (1 << 31) #define AREF_GROUND 0x00 /* analog ref = analog ground */ #define AREF_COMMON 0x01 /* analog ref = analog common */ @@ -114,11 +114,11 @@ #define INSN_READ (0 | INSN_MASK_READ) #define INSN_WRITE (1 | INSN_MASK_WRITE) -#define INSN_BITS (2 | INSN_MASK_READ|INSN_MASK_WRITE) -#define INSN_CONFIG (3 | INSN_MASK_READ|INSN_MASK_WRITE) -#define INSN_GTOD (4 | INSN_MASK_READ|INSN_MASK_SPECIAL) -#define INSN_WAIT (5 | INSN_MASK_WRITE|INSN_MASK_SPECIAL) -#define INSN_INTTRIG (6 | INSN_MASK_WRITE|INSN_MASK_SPECIAL) +#define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE) +#define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE) +#define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL) +#define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) +#define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) /* trigger flags */ /* These flags are used in comedi_trig structures */ @@ -279,7 +279,8 @@ enum configuration_ids { INSN_CONFIG_SET_OTHER_SRC = 2005, /* Set other source */ /* INSN_CONFIG_GET_OTHER_SRC = 2006,*//* Get other source */ /* Get size in bytes of subdevice's on-board fifos used during - * streaming input/output */ + * streaming input/output + */ INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006, INSN_CONFIG_SET_COUNTER_MODE = 4097, /* INSN_CONFIG_8254_SET_MODE is deprecated */ @@ -292,7 +293,8 @@ enum configuration_ids { INSN_CONFIG_PWM_GET_PERIOD = 5001, /* gets frequency */ INSN_CONFIG_GET_PWM_STATUS = 5002, /* is it running? */ /* sets H bridge: duty cycle and sign bit for a relay at the - * same time */ + * same time + */ INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, /* gets H bridge data: duty cycle and the sign bit */ INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 @@ -502,13 +504,13 @@ struct comedi_bufinfo { /* range stuff */ -#define __RANGE(a, b) ((((a)&0xffff)<<16)|((b)&0xffff)) +#define __RANGE(a, b) ((((a) & 0xffff) << 16) | ((b) & 0xffff)) -#define RANGE_OFFSET(a) (((a)>>16)&0xffff) -#define RANGE_LENGTH(b) ((b)&0xffff) +#define RANGE_OFFSET(a) (((a) >> 16) & 0xffff) +#define RANGE_LENGTH(b) ((b) & 0xffff) -#define RF_UNIT(flags) ((flags)&0xff) -#define RF_EXTERNAL (1<<8) +#define RF_UNIT(flags) ((flags) & 0xff) +#define RF_EXTERNAL (1 << 8) #define UNIT_volt 0 #define UNIT_mA 1 @@ -521,23 +523,22 @@ struct comedi_bufinfo { /**********************************************************/ /* - 8254 specific configuration. - - It supports two config commands: - - 0 ID: INSN_CONFIG_SET_COUNTER_MODE - 1 8254 Mode - I8254_MODE0, I8254_MODE1, ..., I8254_MODE5 - OR'ed with: - I8254_BCD, I8254_BINARY - - 0 ID: INSN_CONFIG_8254_READ_STATUS - 1 <-- Status byte returned here. - B7 = Output - B6 = NULL Count - B5 - B0 Current mode. - -*/ + * 8254 specific configuration. + * + * It supports two config commands: + * + * 0 ID: INSN_CONFIG_SET_COUNTER_MODE + * 1 8254 Mode + * I8254_MODE0, I8254_MODE1, ..., I8254_MODE5 + * OR'ed with: + * I8254_BCD, I8254_BINARY + * + * 0 ID: INSN_CONFIG_8254_READ_STATUS + * 1 <-- Status byte returned here. + * B7 = Output + * B6 = NULL Count + * B5 - B0 Current mode. + */ enum i8254_mode { I8254_MODE0 = (0 << 1), /* Interrupt on terminal count */ @@ -545,18 +546,20 @@ enum i8254_mode { I8254_MODE2 = (2 << 1), /* Rate generator */ I8254_MODE3 = (3 << 1), /* Square wave mode */ I8254_MODE4 = (4 << 1), /* Software triggered strobe */ - I8254_MODE5 = (5 << 1), /* Hardware triggered strobe - * (retriggerable) */ - I8254_BCD = 1, /* use binary-coded decimal instead of binary - * (pretty useless) */ + /* Hardware triggered strobe (retriggerable) */ + I8254_MODE5 = (5 << 1), + /* Use binary-coded decimal instead of binary (pretty useless) */ + I8254_BCD = 1, I8254_BINARY = 0 }; #define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x))) #define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b) -/* mode bits for NI general-purpose counters, set with - * INSN_CONFIG_SET_COUNTER_MODE */ +/* + * mode bits for NI general-purpose counters, set with + * INSN_CONFIG_SET_COUNTER_MODE + */ #define NI_GPCT_COUNTING_MODE_SHIFT 16 #define NI_GPCT_INDEX_PHASE_BITSHIFT 20 #define NI_GPCT_COUNTING_DIRECTION_SHIFT 24 @@ -624,8 +627,10 @@ enum ni_gpct_mode_bits { NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000 }; -/* Bits for setting a clock source with - * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters. */ +/* + * Bits for setting a clock source with + * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters. + */ enum ni_gpct_clock_source_bits { NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x3f, NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0, @@ -656,9 +661,11 @@ enum ni_gpct_clock_source_bits { /* no pfi on NI 660x */ #define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x)) -/* Possibilities for setting a gate source with -INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters. -May be bitwise-or'd with CR_EDGE or CR_INVERT. */ +/* + * Possibilities for setting a gate source with + * INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters. + * May be bitwise-or'd with CR_EDGE or CR_INVERT. + */ enum ni_gpct_gate_select { /* m-series gates */ NI_GPCT_TIMESTAMP_MUX_GATE_SELECT = 0x0, @@ -675,9 +682,11 @@ enum ni_gpct_gate_select { /* more gates for 660x "second gate" */ NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201, NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e, - /* m-series "second gate" sources are unknown, + /* + * m-series "second gate" sources are unknown, * we should add them here with an offset of 0x300 when - * known. */ + * known. + */ NI_GPCT_DISABLED_GATE_SELECT = 0x8000, }; @@ -686,8 +695,10 @@ enum ni_gpct_gate_select { #define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x) #define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x)) -/* Possibilities for setting a source with -INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. */ +/* + * Possibilities for setting a source with + * INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. + */ enum ni_gpct_other_index { NI_GPCT_SOURCE_ENCODER_A, NI_GPCT_SOURCE_ENCODER_B, @@ -702,18 +713,24 @@ enum ni_gpct_other_select { #define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x) -/* start sources for ni general-purpose counters for use with -INSN_CONFIG_ARM */ +/* + * start sources for ni general-purpose counters for use with + * INSN_CONFIG_ARM + */ enum ni_gpct_arm_source { NI_GPCT_ARM_IMMEDIATE = 0x0, - NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, /* Start both the counter - * and the adjacent paired - * counter simultaneously */ - /* NI doesn't document bits for selecting hardware arm triggers. + /* + * Start both the counter and the adjacent pared + * counter simultaneously + */ + NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, + /* + * NI doesn't document bits for selecting hardware arm triggers. * If the NI_GPCT_ARM_UNKNOWN bit is set, we will pass the least * significant bits (3 bits for 660x or 5 bits for m-series) * through to the hardware. This will at least allow someone to - * figure out what the bits do later. */ + * figure out what the bits do later. + */ NI_GPCT_ARM_UNKNOWN = 0x1000, }; @@ -728,8 +745,10 @@ enum ni_gpct_filter_select { NI_GPCT_FILTER_2x_TIMEBASE_3 = 0x6 }; -/* PFI digital filtering options for ni m-series for use with - * INSN_CONFIG_FILTER. */ +/* + * PFI digital filtering options for ni m-series for use with + * INSN_CONFIG_FILTER. + */ enum ni_pfi_filter_select { NI_PFI_FILTER_OFF = 0x0, NI_PFI_FILTER_125ns = 0x1, @@ -740,9 +759,11 @@ enum ni_pfi_filter_select { /* master clock sources for ni mio boards and INSN_CONFIG_SET_CLOCK_SRC */ enum ni_mio_clock_source { NI_MIO_INTERNAL_CLOCK = 0, - NI_MIO_RTSI_CLOCK = 1, /* doesn't work for m-series, use - NI_MIO_PLL_RTSI_CLOCK() */ - /* the NI_MIO_PLL_* sources are m-series only */ + /* + * Doesn't work for m-series, use NI_MIO_PLL_RTSI_CLOCK() + * the NI_MIO_PLL_* sources are m-series only + */ + NI_MIO_RTSI_CLOCK = 1, NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2, NI_MIO_PLL_PXI10_CLOCK = 3, NI_MIO_PLL_RTSI0_CLOCK = 4 @@ -750,9 +771,11 @@ enum ni_mio_clock_source { #define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x)) -/* Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING. - The numbers assigned are not arbitrary, they correspond to the bits required - to program the board. */ +/* + * Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING. + * The numbers assigned are not arbitrary, they correspond to the bits required + * to program the board. + */ enum ni_rtsi_routing { NI_RTSI_OUTPUT_ADR_START1 = 0, NI_RTSI_OUTPUT_ADR_START2 = 1, @@ -763,17 +786,19 @@ enum ni_rtsi_routing { NI_RTSI_OUTPUT_G_GATE0 = 6, NI_RTSI_OUTPUT_RGOUT0 = 7, NI_RTSI_OUTPUT_RTSI_BRD_0 = 8, - NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI - * clock on line 7 */ + /* Pre-m-series always have RTSI clock on line 7 */ + NI_RTSI_OUTPUT_RTSI_OSC = 12 }; #define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x)) -/* Signals which can be routed to an NI PFI pin on an m-series board with +/* + * Signals which can be routed to an NI PFI pin on an m-series board with * INSN_CONFIG_SET_ROUTING. These numbers are also returned by * INSN_CONFIG_GET_ROUTING on pre-m-series boards, even though their routing * cannot be changed. The numbers assigned are not arbitrary, they correspond - * to the bits required to program the board. */ + * to the bits required to program the board. + */ enum ni_pfi_routing { NI_PFI_OUTPUT_PFI_DEFAULT = 0, NI_PFI_OUTPUT_AI_START1 = 1, @@ -803,20 +828,24 @@ enum ni_pfi_routing { #define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x)) -/* Signals which can be routed to output on a NI PFI pin on a 660x board - with INSN_CONFIG_SET_ROUTING. The numbers assigned are - not arbitrary, they correspond to the bits required - to program the board. Lines 0 to 7 can only be set to - NI_660X_PFI_OUTPUT_DIO. Lines 32 to 39 can only be set to - NI_660X_PFI_OUTPUT_COUNTER. */ +/* + * Signals which can be routed to output on a NI PFI pin on a 660x board + * with INSN_CONFIG_SET_ROUTING. The numbers assigned are + * not arbitrary, they correspond to the bits required + * to program the board. Lines 0 to 7 can only be set to + * NI_660X_PFI_OUTPUT_DIO. Lines 32 to 39 can only be set to + * NI_660X_PFI_OUTPUT_COUNTER. + */ enum ni_660x_pfi_routing { NI_660X_PFI_OUTPUT_COUNTER = 1, /* counter */ NI_660X_PFI_OUTPUT_DIO = 2, /* static digital output */ }; -/* NI External Trigger lines. These values are not arbitrary, but are related +/* + * NI External Trigger lines. These values are not arbitrary, but are related * to the bits required to program the board (offset by 1 for historical - * reasons). */ + * reasons). + */ #define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1) #define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1) @@ -827,9 +856,11 @@ enum comedi_counter_status_flags { COMEDI_COUNTER_TERMINAL_COUNT = 0x4, }; -/* Clock sources for CDIO subdevice on NI m-series boards. Used as the +/* + * Clock sources for CDIO subdevice on NI m-series boards. Used as the * scan_begin_arg for a comedi_command. These sources may also be bitwise-or'd - * with CR_INVERT to change polarity. */ + * with CR_INVERT to change polarity. + */ enum ni_m_series_cdio_scan_begin_src { NI_CDIO_SCAN_BEGIN_SRC_GROUND = 0, NI_CDIO_SCAN_BEGIN_SRC_AI_START = 18, @@ -846,38 +877,50 @@ enum ni_m_series_cdio_scan_begin_src { #define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) #define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) -/* scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI +/* + * scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to - * change polarity. */ + * change polarity. + */ #define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x) #define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x) -/* Bits for setting a clock source with - * INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice. */ +/* + * Bits for setting a clock source with + * INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice. + */ enum ni_freq_out_clock_source_bits { NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC, /* 10 MHz */ NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC /* 100 KHz */ }; -/* Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for - * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). */ +/* + * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for + * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). + */ enum amplc_dio_clock_source { - AMPLC_DIO_CLK_CLKN, /* per channel external clock - input/output pin (pin is only an - input when clock source set to this - value, otherwise it is an output) */ + /* + * Per channel external clock + * input/output pin (pin is only an + * input when clock source set to this value, + * otherwise it is an output) + */ + AMPLC_DIO_CLK_CLKN, AMPLC_DIO_CLK_10MHZ, /* 10 MHz internal clock */ AMPLC_DIO_CLK_1MHZ, /* 1 MHz internal clock */ AMPLC_DIO_CLK_100KHZ, /* 100 kHz internal clock */ AMPLC_DIO_CLK_10KHZ, /* 10 kHz internal clock */ AMPLC_DIO_CLK_1KHZ, /* 1 kHz internal clock */ - AMPLC_DIO_CLK_OUTNM1, /* output of preceding counter channel - (for channel 0, preceding counter - channel is channel 2 on preceding - counter subdevice, for first counter - subdevice, preceding counter - subdevice is the last counter - subdevice) */ + /* + * Output of preceding counter channel + * (for channel 0, preceding counter + * channel is channel 2 on preceding + * counter subdevice, for first counter + * subdevice, preceding counter + * subdevice is the last counter + * subdevice) + */ + AMPLC_DIO_CLK_OUTNM1, AMPLC_DIO_CLK_EXT, /* per chip external input pin */ /* the following are "enhanced" clock sources for PCIe models */ AMPLC_DIO_CLK_VCC, /* clock input HIGH */ @@ -886,35 +929,39 @@ enum amplc_dio_clock_source { AMPLC_DIO_CLK_20MHZ /* 20 MHz internal clock */ }; -/* Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for - * timer subdevice on some Amplicon DIO PCIe boards (amplc_dio200 driver). */ +/* + * Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for + * timer subdevice on some Amplicon DIO PCIe boards (amplc_dio200 driver). + */ enum amplc_dio_ts_clock_src { AMPLC_DIO_TS_CLK_1GHZ, /* 1 ns period with 20 ns granularity */ AMPLC_DIO_TS_CLK_1MHZ, /* 1 us period */ AMPLC_DIO_TS_CLK_1KHZ /* 1 ms period */ }; -/* Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for - * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). */ +/* + * Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for + * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). + */ enum amplc_dio_gate_source { AMPLC_DIO_GAT_VCC, /* internal high logic level */ AMPLC_DIO_GAT_GND, /* internal low logic level */ AMPLC_DIO_GAT_GATN, /* per channel external gate input */ - AMPLC_DIO_GAT_NOUTNM2, /* negated output of counter channel - minus 2 (for channels 0 or 1, - channel minus 2 is channel 1 or 2 on - the preceding counter subdevice, for - the first counter subdevice the - preceding counter subdevice is the - last counter subdevice) */ + /* + * negated output of counter channel minus 2 + * (for channels 0 or 1, channel minus 2 is channel 1 or 2 on + * the preceding counter subdevice, for the first counter subdevice + * the preceding counter subdevice is the last counter subdevice) + */ + AMPLC_DIO_GAT_NOUTNM2, AMPLC_DIO_GAT_RESERVED4, AMPLC_DIO_GAT_RESERVED5, AMPLC_DIO_GAT_RESERVED6, AMPLC_DIO_GAT_RESERVED7, /* the following are "enhanced" gate sources for PCIe models */ AMPLC_DIO_GAT_NGATN = 6, /* negated per channel gate input */ - AMPLC_DIO_GAT_OUTNM2, /* non-negated output of counter - channel minus 2 */ + /* non-negated output of counter channel minus 2 */ + AMPLC_DIO_GAT_OUTNM2, AMPLC_DIO_GAT_PAT_PRESENT, /* "pattern present" signal */ AMPLC_DIO_GAT_PAT_OCCURRED, /* "pattern occurred" latched */ AMPLC_DIO_GAT_PAT_GONE, /* "pattern gone away" latched */