From: Dirk Brandewie Date: Thu, 6 Oct 2011 18:26:33 +0000 (-0700) Subject: i2c-designware: Support multiple cores using same ISR X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=af06cf6c8cb600803951ddabe6fb034126752488;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git i2c-designware: Support multiple cores using same ISR Add check to make sure that the core is enabled and has outstanding interrupts. The activity bit is masked due to the fact that it will stay active even after the controller has been disabled until the contoller internal state machines have settled. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 6195df3c1c29..e8b83d9029e1 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -521,10 +521,16 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) { struct dw_i2c_dev *dev = dev_id; - u32 stat; + u32 stat, enabled; + + enabled = dw_readl(dev, DW_IC_ENABLE); + stat = dw_readl(dev, DW_IC_RAW_INTR_STAT); + dev_dbg(dev->dev, "%s: %s enabled= 0x%x stat=0x%x\n", __func__, + dev->adapter.name, enabled, stat); + if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY)) + return IRQ_NONE; stat = i2c_dw_read_clear_intrbits(dev); - dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat); if (stat & DW_IC_INTR_TX_ABRT) { dev->cmd_err |= DW_IC_ERR_TX_ABRT;