From: Russell King Date: Sun, 30 Nov 2008 17:11:49 +0000 (+0000) Subject: [ARM] ep93xx: convert to clkdev and match clocks by struct device where possible X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=ae696fd53280d85b43ec1dd74f80162bee088862;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git [ARM] ep93xx: convert to clkdev and match clocks by struct device where possible Signed-off-by: Russell King --- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6fe71af3c3e6..995a1bfe3ae4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -276,6 +276,7 @@ config ARCH_EP93XX select ARM_VIC select GENERIC_GPIO select HAVE_CLK + select COMMON_CLKDEV select ARCH_REQUIRE_GPIOLIB help This enables support for the Cirrus EP93xx series of CPUs. diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index 8c9f2491dccc..96049283a10a 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c @@ -16,11 +16,12 @@ #include #include #include + +#include #include #include struct clk { - char *name; unsigned long rate; int users; u32 enable_reg; @@ -28,53 +29,33 @@ struct clk { }; static struct clk clk_uart = { - .name = "UARTCLK", .rate = 14745600, }; -static struct clk clk_pll1 = { - .name = "pll1", -}; -static struct clk clk_f = { - .name = "fclk", -}; -static struct clk clk_h = { - .name = "hclk", -}; -static struct clk clk_p = { - .name = "pclk", -}; -static struct clk clk_pll2 = { - .name = "pll2", -}; +static struct clk clk_pll1; +static struct clk clk_f; +static struct clk clk_h; +static struct clk clk_p; +static struct clk clk_pll2; static struct clk clk_usb_host = { - .name = "usb_host", .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, }; - -static struct clk *clocks[] = { - &clk_uart, - &clk_pll1, - &clk_f, - &clk_h, - &clk_p, - &clk_pll2, - &clk_usb_host, +#define INIT_CK(dev,con,ck) \ + { .dev_id = dev, .con_id = con, .clk = ck } + +static struct clk_lookup clocks[] = { + INIT_CK("apb:uart1", NULL, &clk_uart), + INIT_CK("apb:uart2", NULL, &clk_uart), + INIT_CK("apb:uart3", NULL, &clk_uart), + INIT_CK(NULL, "pll1", &clk_pll1), + INIT_CK(NULL, "fclk", &clk_f), + INIT_CK(NULL, "hclk", &clk_h), + INIT_CK(NULL, "pclk", &clk_p), + INIT_CK(NULL, "pll2", &clk_pll2), + INIT_CK(NULL, "usb_host", &clk_usb_host), }; -struct clk *clk_get(struct device *dev, const char *id) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(clocks); i++) { - if (!strcmp(clocks[i]->name, id)) - return clocks[i]; - } - - return ERR_PTR(-ENOENT); -} -EXPORT_SYMBOL(clk_get); int clk_enable(struct clk *clk) { @@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk) } EXPORT_SYMBOL(clk_get_rate); -void clk_put(struct clk *clk) -{ -} -EXPORT_SYMBOL(clk_put); - - static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; @@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word) static int __init ep93xx_clock_init(void) { u32 value; + int i; value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); if (!(value & 0x00800000)) { /* PLL1 bypassed? */ @@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void) clk_f.rate / 1000000, clk_h.rate / 1000000, clk_p.rate / 1000000); + for (i = 0; i < ARRAY_SIZE(clocks); i++) + clkdev_add(&clocks[i]); return 0; } arch_initcall(ep93xx_clock_init); diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h new file mode 100644 index 000000000000..04b37a89801c --- /dev/null +++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h @@ -0,0 +1,7 @@ +#ifndef __ASM_MACH_CLKDEV_H +#define __ASM_MACH_CLKDEV_H + +#define __clk_get(clk) ({ 1; }) +#define __clk_put(clk) do { } while (0) + +#endif