From: Steve Longerbeam Date: Sun, 21 May 2017 22:02:10 +0000 (-0700) Subject: gpu: ipu-v3: vdic: include AUTO field order bit in ipu_vdi_set_field_order X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=add1318723a0d7b1ec974d2d9ba309cc24bb298a;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git gpu: ipu-v3: vdic: include AUTO field order bit in ipu_vdi_set_field_order The field order selection in VDIC_C register uses different bits depending on whether the VDIC is receiving from a CSI ("AUTO") or from memory ("MAN"). Since the VDIC cannot receive from both CSI and memory at the same time, set or clear both field order bits to cover both cases. Signed-off-by: Steve Longerbeam Signed-off-by: Philipp Zabel --- diff --git a/drivers/gpu/ipu-v3/ipu-vdi.c b/drivers/gpu/ipu-v3/ipu-vdi.c index f27bf5a12ebc..a66389366af7 100644 --- a/drivers/gpu/ipu-v3/ipu-vdi.c +++ b/drivers/gpu/ipu-v3/ipu-vdi.c @@ -88,9 +88,9 @@ void ipu_vdi_set_field_order(struct ipu_vdi *vdi, v4l2_std_id std, u32 field) reg = ipu_vdi_read(vdi, VDI_C); if (top_field_0) - reg &= ~VDI_C_TOP_FIELD_MAN_1; + reg &= ~(VDI_C_TOP_FIELD_MAN_1 | VDI_C_TOP_FIELD_AUTO_1); else - reg |= VDI_C_TOP_FIELD_MAN_1; + reg |= VDI_C_TOP_FIELD_MAN_1 | VDI_C_TOP_FIELD_AUTO_1; ipu_vdi_write(vdi, reg, VDI_C); spin_unlock_irqrestore(&vdi->lock, flags);