From: Ralf Baechle <ralf@linux-mips.org>
Date: Mon, 12 Oct 2009 20:54:47 +0000 (+0200)
Subject: MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a951f2829adba3f2945172b740528fce4366907d;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4

Based on original patch by Chris Dearman <chris@mips.com>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index b9743190609a..efdb4f66ffcf 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -241,3 +241,16 @@ void __init mips_pcibios_init(void)
 
 	register_pci_controller(controller);
 }
+
+/* Enable PCI 2.1 compatibility in PIIX4 */
+static void __init quirk_dlcsetup(struct pci_dev *dev)
+{
+	u8 odlc, ndlc;
+	(void) pci_read_config_byte(dev, 0x82, &odlc);
+	/* Enable passive releases and delayed transaction */
+	ndlc = odlc | 7;
+	(void) pci_write_config_byte(dev, 0x82, ndlc);
+}
+
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
+	quirk_dlcsetup);