From: Stephen Warren <swarren@nvidia.com>
Date: Fri, 6 Apr 2012 17:18:16 +0000 (-0600)
Subject: ASoC: tegra: set a sensible initial clock rate
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a9005b67b3a2103b2b7e32bf602d3f023076fe06;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

ASoC: tegra: set a sensible initial clock rate

Initialize the audio clock tree appropriately for some reasonable rate.
This makes sure the PLLs etc. are actually programmed to something
reasonable when the audio driver is loaded.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
---

diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c
index f8428e410e05..30424e157f69 100644
--- a/sound/soc/tegra/tegra_asoc_utils.c
+++ b/sound/soc/tegra/tegra_asoc_utils.c
@@ -133,8 +133,14 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
 		goto err_put_pll_a_out0;
 	}
 
+	ret = tegra_asoc_utils_set_rate(data, 44100, 256 * 44100);
+	if (ret)
+		goto err_put_cdev1;
+
 	return 0;
 
+err_put_cdev1:
+	clk_put(data->clk_cdev1);
 err_put_pll_a_out0:
 	clk_put(data->clk_pll_a_out0);
 err_put_pll_a: