From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Tue, 21 Oct 2014 12:32:55 +0000 (+0200)
Subject: Merge branch 'drm-intel-next-fixes' into drm-intel-next
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a8cbd4597799ade2b8a656dac7768c352b58e43a;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge branch 'drm-intel-next-fixes' into drm-intel-next

So I've sent the first pull request to Dave and I expect his request
for a merge tree any second now ;-)

More seriously I have some pending patches for 3.19 that depend upon
both trees, hence backmerge. Conflicts are all trivial.

Conflicts:
	drivers/gpu/drm/i915/i915_irq.c
	drivers/gpu/drm/i915/intel_display.c

v2: Of course I've forgotten the fixup script for the silent conflict.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---

a8cbd4597799ade2b8a656dac7768c352b58e43a
diff --cc drivers/gpu/drm/i915/i915_irq.c
index 737b23982b95,f66392b6e287..f17bbf3ac136
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@@ -3494,12 -3457,15 +3473,14 @@@ static void gen8_irq_reset(struct drm_d
  
  void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv)
  {
 -	unsigned long irqflags;
+ 	uint32_t extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN;
+ 
 -	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
 +	spin_lock_irq(&dev_priv->irq_lock);
  	GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_B, dev_priv->de_irq_mask[PIPE_B],
- 			  ~dev_priv->de_irq_mask[PIPE_B]);
+ 			  ~dev_priv->de_irq_mask[PIPE_B] | extra_ier);
  	GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_C, dev_priv->de_irq_mask[PIPE_C],
- 			  ~dev_priv->de_irq_mask[PIPE_C]);
+ 			  ~dev_priv->de_irq_mask[PIPE_C] | extra_ier);
 -	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 +	spin_unlock_irq(&dev_priv->irq_lock);
  }
  
  static void cherryview_irq_preinstall(struct drm_device *dev)
diff --cc drivers/gpu/drm/i915/intel_display.c
index 6fc77a100cc6,c9e220963a78..1fc05ffc4695
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -73,9 -73,8 +73,6 @@@ static const uint32_t intel_cursor_form
  	DRM_FORMAT_ARGB8888,
  };
  
- #define DIV_ROUND_CLOSEST_ULL(ll, d)	\
- ({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; })
- 
 -static void intel_increase_pllclock(struct drm_device *dev,
 -				    enum pipe pipe);
  static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
  
  static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
@@@ -9771,11 -9930,9 +9778,8 @@@ static int intel_crtc_page_flip(struct 
  	enum pipe pipe = intel_crtc->pipe;
  	struct intel_unpin_work *work;
  	struct intel_engine_cs *ring;
 -	unsigned long flags;
  	int ret;
  
- 	//trigger software GT busyness calculation
- 	gen8_flip_interrupt(dev);
- 
  	/*
  	 * drm_mode_page_flip_ioctl() should already catch this, but double
  	 * check to be safe.  In the future we may enable pageflipping from
diff --cc drivers/gpu/drm/i915/intel_drv.h
index ffbf38d9b536,ba715229a540..94993d23e547
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@@ -34,8 -34,10 +34,11 @@@
  #include <drm/drm_crtc_helper.h>
  #include <drm/drm_fb_helper.h>
  #include <drm/drm_dp_mst_helper.h>
 +#include <drm/drm_rect.h>
  
+ #define DIV_ROUND_CLOSEST_ULL(ll, d)	\
+ ({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; })
+ 
  /**
   * _wait_for - magic (register) wait macro
   *