From: Giuseppe CAVALLARO Date: Mon, 10 Oct 2011 21:37:56 +0000 (+0000) Subject: net/phy: extra delay only for RGMII interfaces for IC+ IP 1001 X-Git-Tag: MMI-PSA29.97-13-9~18247^2~90 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a4886d522e18e5d4a63b95a5ead72f6105e3ef98;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git net/phy: extra delay only for RGMII interfaces for IC+ IP 1001 The extra delay of 2ns to adjust RX clock phase is actually needed in RGMII mode. Tested on the HDK7108 (STx7108c2). Signed-off-by: Giuseppe Cavallaro Signed-off-by: David S. Miller --- diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c index d66bd8d12599..c81f136ae670 100644 --- a/drivers/net/phy/icplus.c +++ b/drivers/net/phy/icplus.c @@ -128,12 +128,15 @@ static int ip1001_config_init(struct phy_device *phydev) if (c < 0) return c; - /* Additional delay (2ns) used to adjust RX clock phase - * at GMII/ RGMII interface */ - c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); - c |= IP1001_PHASE_SEL_MASK; + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { + /* Additional delay (2ns) used to adjust RX clock phase + * at RGMII interface */ + c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); + c |= IP1001_PHASE_SEL_MASK; + c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c); + } - return phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c); + return c; } static int ip101a_config_init(struct phy_device *phydev)