From: Kevin Cernekee <cernekee@gmail.com>
Date: Sat, 11 Oct 2014 18:10:47 +0000 (-0700)
Subject: USB: OHCI: Eliminate platform-specific test in ohci.h
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a4760b3413732bccac2795b6aed28e2ff99c8ef4;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

USB: OHCI: Eliminate platform-specific test in ohci.h

The bcm63xx and bcm3384 platforms need to set OHCI_QUIRK_FRAME_NO, but
they are non-PPC platforms and don't enable CONFIG_PPC_MPC52xx.
Therefore this patch changes the code that uses OHCI_QUIRK_FRAME_NO,
making it not depend on CONFIG_PPC_MPC52xx.

Also, rephrase the comments describing OHCI_QUIRK_FRAME_NO and the
related PSW endian swap.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 59f424567a8d..bc462288cfb0 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -647,23 +647,22 @@ static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x)
 
 /*-------------------------------------------------------------------------*/
 
-/* HCCA frame number is 16 bits, but is accessed as 32 bits since not all
- * hardware handles 16 bit reads.  That creates a different confusion on
- * some big-endian SOC implementations.  Same thing happens with PSW access.
+/*
+ * The HCCA frame number is 16 bits, but is accessed as 32 bits since not all
+ * hardware handles 16 bit reads.  Depending on the SoC implementation, the
+ * frame number can wind up in either bits [31:16] (default) or
+ * [15:0] (OHCI_QUIRK_FRAME_NO) on big endian hosts.
+ *
+ * Somewhat similarly, the 16-bit PSW fields in a transfer descriptor are
+ * reordered on BE.
  */
 
-#ifdef CONFIG_PPC_MPC52xx
-#define big_endian_frame_no_quirk(ohci)	(ohci->flags & OHCI_QUIRK_FRAME_NO)
-#else
-#define big_endian_frame_no_quirk(ohci)	0
-#endif
-
 static inline u16 ohci_frame_no(const struct ohci_hcd *ohci)
 {
 	u32 tmp;
 	if (big_endian_desc(ohci)) {
 		tmp = be32_to_cpup((__force __be32 *)&ohci->hcca->frame_no);
-		if (!big_endian_frame_no_quirk(ohci))
+		if (!(ohci->flags & OHCI_QUIRK_FRAME_NO))
 			tmp >>= 16;
 	} else
 		tmp = le32_to_cpup((__force __le32 *)&ohci->hcca->frame_no);