From: David Weinehall Date: Thu, 19 May 2016 12:50:36 +0000 (+0300) Subject: drm/i915: only disable memory self-refresh on GMCH X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a4015f9a9c3c206b57b22c4ad05b1d68332ffb2e;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: only disable memory self-refresh on GMCH The atomic version of intel_pre_plane_update did not check for HAS_GMCH_DISPLAY before calling intel_set_memory_cxsr(). While this doesn't cause any issues on its own (it will return without doing anything if the hardware doesn't have the required feature), the drm_wait_one_vblank() that is needed if memory self-refresh is disabled introduces an unnecessary delay in the suspend path. In cases where i915 is on the critical path it means that we slow down suspend by 16.8ms on platforms that don't need to disable memory self-refresh. Signed-off-by: David Weinehall Link: http://patchwork.freedesktop.org/patch/msgid/1463662236-18192-1-git-send-email-david.weinehall@linux.intel.com Reviewed-by: Ville Syrjälä --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6eceefb2ceb4..12ff79594bc1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4648,7 +4648,7 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state) intel_pre_disable_primary(&crtc->base); } - if (pipe_config->disable_cxsr) { + if (pipe_config->disable_cxsr && HAS_GMCH_DISPLAY(dev)) { crtc->wm.cxsr_allowed = false; /*