From: Mark Brown <broonie@linaro.org>
Date: Wed, 10 Jul 2013 13:57:26 +0000 (+0100)
Subject: spi: Support transfer speed checking in the core
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a2fd4f9fa3b9f051550b36c4dfa74bc32bda24ee;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git

spi: Support transfer speed checking in the core

Allow drivers to avoid implementing their own checks for simple rates by
specifying the limits in the master structure.

Signed-off-by: Mark Brown <broonie@linaro.org>
---

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 978dda2c5239..a52f16685d6a 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1387,6 +1387,13 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
 					BIT(xfer->bits_per_word - 1)))
 				return -EINVAL;
 		}
+
+		if (xfer->speed_hz && master->min_speed_hz &&
+		    xfer->speed_hz < master->min_speed_hz)
+			return -EINVAL;
+		if (xfer->speed_hz && master->max_speed_hz &&
+		    xfer->speed_hz > master->max_speed_hz)
+			return -EINVAL;
 	}
 
 	message->spi = spi;
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 28e440be1c07..cdf668156154 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -233,6 +233,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
  *	suported. If set, the SPI core will reject any transfer with an
  *	unsupported bits_per_word. If not set, this value is simply ignored,
  *	and it's up to the individual driver to perform any validation.
+ * @min_speed_hz: Lowest supported transfer speed
+ * @max_speed_hz: Highest supported transfer speed
  * @flags: other constraints relevant to this driver
  * @bus_lock_spinlock: spinlock for SPI bus locking
  * @bus_lock_mutex: mutex for SPI bus locking
@@ -312,6 +314,10 @@ struct spi_master {
 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0UL : (BIT(bits) - 1))
 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
 
+	/* limits on transfer speed */
+	u32			min_speed_hz;
+	u32			max_speed_hz;
+
 	/* other constraints relevant to this driver */
 	u16			flags;
 #define SPI_MASTER_HALF_DUPLEX	BIT(0)		/* can't do full duplex */