From: Pavel Roskin Date: Sun, 4 Feb 2007 08:16:08 +0000 (-0500) Subject: [POWERPC] Assign all PCI busses on G3 Blue & White X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a1fdf6940a2a3d3c7475755eba5881403473252d;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git [POWERPC] Assign all PCI busses on G3 Blue & White G3 Blue & White is misconfigured by default so that CardBus controllers in PCI slots don't work. The PCI bridge is programmed to only allow access to bus 1 but not higher busses. The patch forces the PCI busses to be reassigned if a Grackle controller is found and the machine identifies itself as "PowerMac1,1" Signed-off-by: Pavel Roskin Acked-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c index b6ec793a23be..42053625f498 100644 --- a/arch/powerpc/sysdev/grackle.c +++ b/arch/powerpc/sysdev/grackle.c @@ -56,6 +56,8 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) void __init setup_grackle(struct pci_controller *hose) { setup_indirect_pci(hose, 0xfec00000, 0xfee00000); + if (machine_is_compatible("PowerMac1,1")) + pci_assign_all_buses = 1; if (machine_is_compatible("AAPL,PowerBook1998")) grackle_set_loop_snoop(hose, 1); #if 0 /* Disabled for now, HW problems ??? */