From: Haojian Zhuang <haojian.zhuang@gmail.com>
Date: Sat, 4 Aug 2012 15:57:38 +0000 (+0800)
Subject: ARM: mmp: enable tauros2 cache in pxa910
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=a03d8b1e4606be10c0fedf1ccabe22dc3a5060f9;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

ARM: mmp: enable tauros2 cache in pxa910

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
---

diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index aebf32de73b4..a3be44d86bcd 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -25,6 +25,11 @@
 		interrupt-parent = <&intc>;
 		ranges;
 
+		L2: l2-cache {
+			compatible = "marvell,tauros2-cache";
+			marvell,tauros2-cache-features = <0x3>;
+		};
+
 		axi@d4200000 {	/* AXI */
 			compatible = "mrvl,axi-bus", "simple-bus";
 			#address-cells = <1>;
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 6da52e9f2bdc..51ac8d1898c1 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 
+#include <asm/hardware/cache-tauros2.h>
 #include <asm/mach/time.h>
 #include <mach/addr-map.h>
 #include <mach/regs-apbc.h>
@@ -116,6 +117,9 @@ static struct clk_lookup pxa910_clkregs[] = {
 static int __init pxa910_init(void)
 {
 	if (cpu_is_pxa910()) {
+#ifdef CONFIG_CACHE_TAUROS2
+		tauros2_init(0);
+#endif
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa910_mfp_addr_map);
 		pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);