From: Paul Mackerras Date: Fri, 18 Apr 2008 04:26:08 +0000 (+1000) Subject: [POWERPC] Optimize fls64() on 64-bit processors X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=9f264be6101c42cb9e471c58322fb83a5cde1461;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git [POWERPC] Optimize fls64() on 64-bit processors 64-bit powerpc processors can find the leftmost 1 bit in a 64-bit doubleword in one instruction, so use that rather than using the generic fls64(), which does two 32-bit fls() calls. Signed-off-by: Paul Mackerras --- diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h index 36c8f3a43792..a99a74929475 100644 --- a/include/asm-powerpc/bitops.h +++ b/include/asm-powerpc/bitops.h @@ -312,7 +312,24 @@ static __inline__ int fls(unsigned int x) asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); return 32 - lz; } + +/* + * 64-bit can do this using one cntlzd (count leading zeroes doubleword) + * instruction; for 32-bit we use the generic version, which does two + * 32-bit fls calls. + */ +#ifdef __powerpc64__ +static __inline__ int fls64(__u64 x) +{ + int lz; + + asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); + return 64 - lz; +} +#else #include +#endif /* __powerpc64__ */ + #include #include