From: Anton Blanchard Date: Sun, 14 Oct 2007 19:33:17 +0000 (+1000) Subject: [POWERPC] Quieten cache information at boot X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=9697add0f88b439d4f5f25556785beeaf6b836b9;p=GitHub%2FLineageOS%2FG12%2Fandroid_kernel_amlogic_linux-4.9.git [POWERPC] Quieten cache information at boot After 6 years the ppc64 kernel still thinks its important to tell me my cache line size is 0x80 bytes. I think most people who care know that by now. The rest probably cant even understand the hex output. Since we might have misconfigured firmware or cpus that have a linesize that isnt 128 bytes, I still print it out for those cases. If people would prefer to remove it completely, lets do it. Also for lpar remove the htab_address printout since its not used. Anton ppc64 boot log usability expert Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras --- diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 0e014550b83f..ede77dbbd4df 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -426,11 +426,14 @@ void __init setup_system(void) printk("-----------------------------------------------------\n"); printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); - printk("ppc64_caches.dcache_line_size = 0x%x\n", - ppc64_caches.dline_size); - printk("ppc64_caches.icache_line_size = 0x%x\n", - ppc64_caches.iline_size); - printk("htab_address = 0x%p\n", htab_address); + if (ppc64_caches.dline_size != 0x80) + printk("ppc64_caches.dcache_line_size = 0x%x\n", + ppc64_caches.dline_size); + if (ppc64_caches.iline_size != 0x80) + printk("ppc64_caches.icache_line_size = 0x%x\n", + ppc64_caches.iline_size); + if (htab_address) + printk("htab_address = 0x%p\n", htab_address); printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); #if PHYSICAL_START > 0 printk("physical_start = 0x%x\n", PHYSICAL_START);