From: Sunmi Lee <carrotsm.lee@samsung.com>
Date: Tue, 3 Jul 2018 10:42:46 +0000 (+0900)
Subject: [COMMON] fimc-is2: Added new function to keep compatibility
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=9554b9c9954c81cfebe23468b4b638be2fb75d74;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

[COMMON] fimc-is2: Added new function to keep compatibility

Added cac related function for mcsc v4.0 and v4.10.

PR JIRA ID: CPR-25

Change-Id: If9d79014635214a5f185bbd822b42453bee532f1
Signed-off-by: Sunmi Lee <carrotsm.lee@samsung.com>
---

diff --git a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v410.c b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v410.c
index 77c3038bf4a7..573e047ceea4 100644
--- a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v410.c
+++ b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v410.c
@@ -3794,6 +3794,22 @@ void fimc_is_scaler_set_djag_tunning_param(void __iomem *base_addr, const struct
 	/* not support */
 }
 
+/* for CAC */
+void fimc_is_scaler_set_cac_enable(void __iomem *base_addr, u32 en)
+{
+	/* not supported */
+}
+
+void fimc_is_scaler_set_cac_input_source(void __iomem *base_addr, u32 in)
+{
+	/* not supported */
+}
+
+void fimc_is_scaler_set_cac_map_crt_thr(void __iomem *base_addr, struct cac_cfg_by_ni *cfg)
+{
+	/* not supported */
+}
+
 /* DS */
 void fimc_is_scaler_set_ds_enable(void __iomem *base_addr, u32 ds_enable)
 {
diff --git a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v4_0.c b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v4_0.c
index d77bb16d9c45..af6a4bba84d6 100644
--- a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v4_0.c
+++ b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v4_0.c
@@ -3845,6 +3845,22 @@ void fimc_is_scaler_set_djag_tunning_param(void __iomem *base_addr, const struct
 	fimc_is_hw_set_reg(base_addr, &mcsc_regs[MCSC_R_DJAG_CP_ARBI], reg_value);
 }
 
+/* for CAC */
+void fimc_is_scaler_set_cac_enable(void __iomem *base_addr, u32 en)
+{
+	/* not supported */
+}
+
+void fimc_is_scaler_set_cac_input_source(void __iomem *base_addr, u32 in)
+{
+	/* not supported */
+}
+
+void fimc_is_scaler_set_cac_map_crt_thr(void __iomem *base_addr, struct cac_cfg_by_ni *cfg)
+{
+	/* not supported */
+}
+
 /* DS */
 void fimc_is_scaler_set_ds_enable(void __iomem *base_addr, u32 ds_enable)
 {