From: Damien Lespiau <damien.lespiau@intel.com>
Date: Tue, 4 Nov 2014 17:06:58 +0000 (+0000)
Subject: drm/i915/skl: Rework when the transition WMs are computed
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=9414f563f3857018d87e480b7cd13636b0c00ce6;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

drm/i915/skl: Rework when the transition WMs are computed

The transition WMs code was doing a shortcut and the values were copied
from the WM0 ones at compute_wm_results() time. Going forward, we want
to compute them like the other WMs and resolve their final register
values in the same way as well.

This patch does just that and isolate the transtion WM compute code in
skl_compute_transition_wm() while skl_compute_wm_results() takes care of
the register values.

We also take the opportunity to disable the transition WMs for now.
We've noticed underruns and they seem to be the culprit.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 66f142bcbee4..41cfb2624cdc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3374,14 +3374,18 @@ skl_compute_linetime_wm(struct drm_crtc *crtc, struct skl_pipe_wm_parameters *p)
 
 static void skl_compute_transition_wm(struct drm_crtc *crtc,
 				      struct skl_pipe_wm_parameters *params,
-				      struct skl_pipe_wm *pipe_wm)
+				      struct skl_wm_level *trans_wm /* out */)
 {
-	/*
-	 * For now it is suggested to use the LP0 wm val of corresponding
-	 * plane as transition wm val.
-	 */
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	int i;
+
 	if (!params->active)
 		return;
+
+	/* Until we know more, just disable transition WMs */
+	for (i = 0; i < intel_num_planes(intel_crtc); i++)
+		trans_wm->plane_en[i] = false;
+	trans_wm->cursor_en = false;
 }
 
 static void skl_compute_pipe_wm(struct drm_crtc *crtc,
@@ -3401,7 +3405,7 @@ static void skl_compute_pipe_wm(struct drm_crtc *crtc,
 	}
 	pipe_wm->linetime = skl_compute_linetime_wm(crtc, params);
 
-	skl_compute_transition_wm(crtc, params, pipe_wm);
+	skl_compute_transition_wm(crtc, params, &pipe_wm->trans_wm);
 }
 
 static void skl_compute_wm_results(struct drm_device *dev,
@@ -3412,11 +3416,10 @@ static void skl_compute_wm_results(struct drm_device *dev,
 {
 	int level, max_level = ilk_wm_max_level(dev);
 	enum pipe pipe = intel_crtc->pipe;
+	uint32_t temp;
+	int i;
 
 	for (level = 0; level <= max_level; level++) {
-		uint32_t temp;
-		int i;
-
 		for (i = 0; i < intel_num_planes(intel_crtc); i++) {
 			temp = 0;
 
@@ -3427,9 +3430,6 @@ static void skl_compute_wm_results(struct drm_device *dev,
 				temp |= PLANE_WM_EN;
 
 			r->plane[pipe][i][level] = temp;
-			/* Use the LP0 WM value for transition WM for now. */
-			if (level == 0)
-				r->plane_trans[pipe][i] = temp;
 		}
 
 		temp = 0;
@@ -3441,12 +3441,28 @@ static void skl_compute_wm_results(struct drm_device *dev,
 			temp |= PLANE_WM_EN;
 
 		r->cursor[pipe][level] = temp;
-		/* Use the LP0 WM value for transition WM for now. */
-		if (level == 0)
-			r->cursor_trans[pipe] = temp;
 
 	}
 
+	/* transition WMs */
+	for (i = 0; i < intel_num_planes(intel_crtc); i++) {
+		temp = 0;
+		temp |= p_wm->trans_wm.plane_res_l[i] << PLANE_WM_LINES_SHIFT;
+		temp |= p_wm->trans_wm.plane_res_b[i];
+		if (p_wm->trans_wm.plane_en[i])
+			temp |= PLANE_WM_EN;
+
+		r->plane_trans[pipe][i] = temp;
+	}
+
+	temp = 0;
+	temp |= p_wm->trans_wm.cursor_res_l << PLANE_WM_LINES_SHIFT;
+	temp |= p_wm->trans_wm.cursor_res_b;
+	if (p_wm->trans_wm.cursor_en)
+		temp |= PLANE_WM_EN;
+
+	r->cursor_trans[pipe] = temp;
+
 	r->wm_linetime[pipe] = p_wm->linetime;
 }