From: Bjorn Helgaas Date: Tue, 7 Jun 2005 20:22:18 +0000 (-0700) Subject: [PATCH] PCI: do VIA IRQ fixup always, not just in PIC mode X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=93cffffa19960464a52f9c78d9a6150270d23785;p=GitHub%2FLineageOS%2Fandroid_kernel_samsung_universal7580.git [PATCH] PCI: do VIA IRQ fixup always, not just in PIC mode At least some VIA chipsets require the fixup even in IO-APIC mode. This was found and debugged with the patient assistance of Stian Jordet on an Asus CUV266-DLS motherboard. Signed-off-by: Bjorn Helgaas Signed-off-by: Greg Kroah-Hartman Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 637e9493034..2194669300b 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -459,17 +459,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC, #endif /* CONFIG_X86_IO_APIC */ -/* - * Via 686A/B: The PCI_INTERRUPT_LINE register for the on-chip - * devices, USB0/1, AC97, MC97, and ACPI, has an unusual feature: - * when written, it makes an internal connection to the PIC. - * For these devices, this register is defined to be 4 bits wide. - * Normally this is fine. However for IO-APIC motherboards, or - * non-x86 architectures (yes Via exists on PPC among other places), - * we must mask the PCI_INTERRUPT_LINE value versus 0xf to get - * interrupts delivered properly. - */ - /* * FIXME: it is questionable that quirk_via_acpi * is needed. It shows up as an ISA bridge, and does not @@ -492,28 +481,30 @@ static void __devinit quirk_via_acpi(struct pci_dev *d) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_acpi ); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_acpi ); -static void quirk_via_irqpic(struct pci_dev *dev) +/* + * Via 686A/B: The PCI_INTERRUPT_LINE register for the on-chip + * devices, USB0/1, AC97, MC97, and ACPI, has an unusual feature: + * when written, it makes an internal connection to the PIC. + * For these devices, this register is defined to be 4 bits wide. + * Normally this is fine. However for IO-APIC motherboards, or + * non-x86 architectures (yes Via exists on PPC among other places), + * we must mask the PCI_INTERRUPT_LINE value versus 0xf to get + * interrupts delivered properly. + */ +static void quirk_via_irq(struct pci_dev *dev) { u8 irq, new_irq; -#ifdef CONFIG_X86_IO_APIC - if (nr_ioapics && !skip_ioapic_setup) - return; -#endif -#ifdef CONFIG_ACPI - if (acpi_irq_model != ACPI_IRQ_MODEL_PIC) - return; -#endif new_irq = dev->irq & 0xf; pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); if (new_irq != irq) { - printk(KERN_INFO "PCI: Via PIC IRQ fixup for %s, from %d to %d\n", + printk(KERN_INFO "PCI: Via IRQ fixup for %s, from %d to %d\n", pci_name(dev), irq, new_irq); udelay(15); /* unknown if delay really needed */ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); } } -DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irqpic); +DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irq); /* * PIIX3 USB: We have to disable USB interrupts that are