From: Rajendra Nayak Date: Mon, 16 Nov 2009 13:36:53 +0000 (+0000) Subject: omap3: clock: Fix the DPLL freqsel computations X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=9346f48b26a4b48a7d56314bbb94e6b801e28316;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git omap3: clock: Fix the DPLL freqsel computations Fix the freqsel value computation. Use n instead of (n+1) The formula in the TRM uses a zero-based N, hence the (n+1); however at this point in the clock34xx.c code, N is one-based. Hayati Bayrakdar and Nishanth Menon helped track down this bug. Signed-off-by: Rajendra Nayak Signed-off-by: Paul Walmsley [paul@pwsan.com: modified commit message] Cc: Hayati Bayrakdar Cc: Nishanth Menon Signed-off-by: Tony Lindgren --- diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 489556eecbd1..7c5c00df3c70 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -473,7 +473,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n) unsigned long fint; u16 f = 0; - fint = clk->dpll_data->clk_ref->rate / (n + 1); + fint = clk->dpll_data->clk_ref->rate / n; pr_debug("clock: fint is %lu\n", fint);