From: David Howells Date: Tue, 26 Sep 2006 06:32:07 +0000 (-0700) Subject: [PATCH] FRV: Fix fls() to handle bit 31 being set correctly X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=92fc707208bb2e601c24b5ab65db37bcb361b658;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git [PATCH] FRV: Fix fls() to handle bit 31 being set correctly Fix FRV fls() to handle bit 31 being set correctly (it should return 32 not 0). Signed-off-by: David Howells Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/include/asm-frv/bitops.h b/include/asm-frv/bitops.h index 980ae1b0cd28..97fb746f76c7 100644 --- a/include/asm-frv/bitops.h +++ b/include/asm-frv/bitops.h @@ -161,16 +161,29 @@ static inline int __test_bit(int nr, const volatile void * addr) #include #include -/* - * fls: find last bit set. +/** + * fls - find last bit set + * @x: the word to search + * + * This is defined the same way as ffs: + * - return 32..1 to indicate bit 31..0 most significant bit set + * - return 0 to indicate no bits set */ #define fls(x) \ ({ \ int bit; \ \ - asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x)); \ + asm(" subcc %1,gr0,gr0,icc0 \n" \ + " ckne icc0,cc4 \n" \ + " cscan.p %1,gr0,%0 ,cc4,#1 \n" \ + " csub %0,%0,%0 ,cc4,#0 \n" \ + " csub %2,%0,%0 ,cc4,#1 \n" \ + : "=&r"(bit) \ + : "r"(x), "r"(32) \ + : "icc0", "cc4" \ + ); \ \ - bit ? 33 - bit : bit; \ + bit; \ }) #include