From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Date: Wed, 9 Aug 2017 19:14:51 +0000 (+0200)
Subject: mmc: renesas_sdhi: enably CBSY bit for RZ platform
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=92b7db8e7a7de26ece965ce934e2f072c02d9f9c;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

mmc: renesas_sdhi: enably CBSY bit for RZ platform

It is documented, so enable it to follow the recommendation in the docs
and also save a few cycles.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Chris Brandt <Chris.Brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---

diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
index 9b77f521cd2c..160fbb22ca00 100644
--- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
@@ -33,7 +33,8 @@ static const struct renesas_sdhi_of_data of_default_cfg = {
 };
 
 static const struct renesas_sdhi_of_data of_rz_compatible = {
-	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
+			  TMIO_MMC_HAVE_CBSY,
 	.tmio_ocr_mask	= MMC_VDD_32_33,
 	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
 };