From: Helge Deller Date: Sat, 29 Jun 2013 20:08:03 +0000 (+0200) Subject: parisc: optimize mtsp(0,sr) inline assembly X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=92b59929825d67db575043a76651865d16873b36;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git parisc: optimize mtsp(0,sr) inline assembly If the value which should be moved into a space register is zero, we can optimize the inline assembly to become "mtsp %r0,%srX". Signed-off-by: Helge Deller Cc: # 3.10 --- diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h index d306b75bc77f..e1509308899f 100644 --- a/arch/parisc/include/asm/special_insns.h +++ b/arch/parisc/include/asm/special_insns.h @@ -32,9 +32,12 @@ static inline void set_eiem(unsigned long val) cr; \ }) -#define mtsp(gr, cr) \ - __asm__ __volatile__("mtsp %0,%1" \ +#define mtsp(val, cr) \ + { if (__builtin_constant_p(val) && ((val) == 0)) \ + __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \ + else \ + __asm__ __volatile__("mtsp %0,%1" \ : /* no outputs */ \ - : "r" (gr), "i" (cr) : "memory") + : "r" (val), "i" (cr) : "memory"); } #endif /* __PARISC_SPECIAL_INSNS_H */