From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Wed, 3 Jul 2013 18:54:50 +0000 (-0700)
Subject: Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=92295f632cefbdf15d46e9ac5f0fc3cfade35259;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux

Pull clock framework updates from Mike Turquette:
 "The common clock framework changes for 3.11 include new clock drivers
  across several different platforms and architectures, fixes to
  existing drivers, a MAINTAINERS file fix and improvements to the basic
  clock types that allow them to be of use to more platforms than before.

  Only a few fixes to the core framework are included with most all of
  the changes landing in the various clock drivers themselves."

* tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux: (55 commits)
  clk: tegra: fix ifdef for tegra_periph_reset_assert inline
  clk: tegra: provide tegra_periph_reset_assert alternative
  clk: exynos4: Fix clock aliases for cpufreq related clocks
  clk: samsung: Add MUX_FA macro to pass flag and alias
  clk: add support for Rockchip gate clocks
  clk: vexpress: Make the clock drivers directly available for arm64
  clk: vexpress: Use full node name to identify individual clocks
  clk: tegra: T114: add DFLL DVCO reset control
  clk: tegra: T114: add DFLL source clocks
  clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL
  clk: gate: add CLK_GATE_HIWORD_MASK
  clk: divider: add CLK_DIVIDER_HIWORD_MASK flag
  clk: mux: add CLK_MUX_HIWORD_MASK
  clk: Always notify whole subtree when reparenting
  MAINTAINERS: make drivers/clk entry match subdirs
  clk: honor CLK_GET_RATE_NOCACHE in clk_set_rate
  clk: use clk_get_rate() for debugfs
  clk: tegra: Use override bits when needed
  clk: tegra: override bits for Tegra30 PLLM
  clk: tegra: override bits for Tegra114 PLLM
  ...
---

92295f632cefbdf15d46e9ac5f0fc3cfade35259
diff --cc drivers/clk/tegra/clk-tegra114.c
index 40d939d091bf,fdf14c1abd14..b6015cb4fc01
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@@ -250,9 -283,10 +283,13 @@@
  #define CLK_SOURCE_XUSB_DEV_SRC 0x60c
  #define CLK_SOURCE_EMC 0x19c
  
+ /* PLLM override registers */
+ #define PMC_PLLM_WB0_OVERRIDE 0x1dc
+ #define PMC_PLLM_WB0_OVERRIDE_2 0x2b0
+ 
 +/* Tegra CPU clock and reset control regs */
 +#define CLK_RST_CONTROLLER_CPU_CMPLX_STATUS	0x470
 +
  static int periph_clk_enb_refcnt[CLK_OUT_ENB_NUM * 32];
  
  static void __iomem *clk_base;