From: Dave Airlie <airlied@redhat.com>
Date: Thu, 17 Mar 2016 21:16:25 +0000 (+1000)
Subject: Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm... 
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=902d02db1ff1b0d0075276917a36ba70847798a7;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few other misc cleanups and bug fixes for 4.6.  Highlights:
- unify endian handling in powerplay
- powerplay fixes
- fix a regression in 4.5 on boards with no display connectors
- fence cleanups and locking fixes
- whitespace cleanups and code refactoring in radeon

* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (35 commits)
  drm/amdgpu/gfx7: add MTYPE definition
  drm/amdgpu: removing BO_VAs shouldn't be interruptible
  drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
  drm/amd/powerplay: show uvd/vce power gate info for fiji
  drm/amdgpu: use sched fence if possible
  drm/amdgpu: move ib.fence to job.fence
  drm/amdgpu: give a fence param to ib_free
  drm/amdgpu: include the right version of gmc header files for iceland
  drm/radeon: fix indentation.
  drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
  drm/amdgpu: switch back to 32bit hw fences v2
  drm/amdgpu: remove amdgpu_fence_is_signaled
  drm/amdgpu: drop the extra fence range check v2
  drm/amdgpu: signal fences directly in amdgpu_fence_process
  drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
  drm/amdgpu: keep all fences in an RCU protected array v2
  drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
  drm/amdgpu: RCU protected amd_sched_fence_release
  drm/amdgpu: RCU protected amdgpu_fence_release
  drm/amdgpu: merge amdgpu_fence_process and _activity
  ...
---

902d02db1ff1b0d0075276917a36ba70847798a7
diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 2faf03bcda21,476a8ce28bed..8bf84efafb04
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@@ -355,9 -353,9 +353,9 @@@ int amdgpu_sa_bo_new(struct amdgpu_sa_m
  			/* see if we can skip over some allocations */
  		} while (amdgpu_sa_bo_next_hole(sa_manager, fences, tries));
  
- 		for (i = 0, count = 0; i < AMDGPU_MAX_RINGS; ++i)
+ 		for (i = 0, count = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
  			if (fences[i])
 -				fences[count++] = fences[i];
 +				fences[count++] = fence_get(fences[i]);
  
  		if (count) {
  			spin_unlock(&sa_manager->wq.lock);
diff --cc drivers/gpu/drm/radeon/radeon_display.c
index e29096b2fa6b,ec6e65965079..fcc7483d3f7b
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@@ -403,11 -403,10 +403,11 @@@ static void radeon_flip_work_func(struc
  	struct drm_crtc *crtc = &radeon_crtc->base;
  	unsigned long flags;
  	int r;
 -	int vpos, hpos, stat, min_udelay;
 +	int vpos, hpos, stat, min_udelay = 0;
 +	unsigned repcnt = 4;
  	struct drm_vblank_crtc *vblank = &crtc->dev->vblank[work->crtc_id];
  
-         down_read(&rdev->exclusive_lock);
+ 	down_read(&rdev->exclusive_lock);
  	if (work->fence) {
  		struct radeon_fence *fence;