From: Ben Skeggs <bskeggs@redhat.com>
Date: Tue, 2 Nov 2010 23:57:28 +0000 (+1000)
Subject: drm/nouveau: allow irq handlers to be installed by engine-specific code
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8f8a54482b008714ccfad15f4592b3802b80d479;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

drm/nouveau: allow irq handlers to be installed by engine-specific code

Lets start to clean up this mess!

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
---

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index a94430b94a20..52dc97d87ebd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -614,6 +614,7 @@ struct drm_nouveau_private {
 	struct nouveau_bo *vga_ram;
 
 	/* interrupt handling */
+	void (*irq_handler[32])(struct drm_device *);
 	bool msi_enabled;
 	struct workqueue_struct *wq;
 	struct work_struct irq_work;
@@ -900,6 +901,9 @@ extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
 extern int         nouveau_irq_init(struct drm_device *);
 extern void        nouveau_irq_fini(struct drm_device *);
 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
+extern void        nouveau_irq_register(struct drm_device *, int status_bit,
+					void (*)(struct drm_device *));
+extern void        nouveau_irq_unregister(struct drm_device *, int status_bit);
 extern void        nouveau_irq_preinstall(struct drm_device *);
 extern int         nouveau_irq_postinstall(struct drm_device *);
 extern void        nouveau_irq_uninstall(struct drm_device *);
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index f3ae74ef3318..819bc3dd89e0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -1216,8 +1216,9 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
 {
 	struct drm_device *dev = (struct drm_device *)arg;
 	struct drm_nouveau_private *dev_priv = dev->dev_private;
-	uint32_t status;
 	unsigned long flags;
+	u32 status;
+	int i;
 
 	status = nv_rd32(dev, NV03_PMC_INTR_0);
 	if (!status)
@@ -1267,6 +1268,14 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
 			    NV_PMC_INTR_0_NV50_I2C_PENDING);
 	}
 
+	for (i = 0; i < 32 && status; i++) {
+		if (!(status & (1 << i)) || !dev_priv->irq_handler[i])
+			continue;
+
+		dev_priv->irq_handler[i](dev);
+		status &= ~(1 << i);
+	}
+
 	if (status)
 		NV_ERROR(dev, "Unhandled PMC INTR status bits 0x%08x\n", status);
 
@@ -1304,3 +1313,26 @@ nouveau_irq_fini(struct drm_device *dev)
 	if (dev_priv->msi_enabled)
 		pci_disable_msi(dev->pdev);
 }
+
+void
+nouveau_irq_register(struct drm_device *dev, int status_bit,
+		     void (*handler)(struct drm_device *))
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	unsigned long flags;
+
+	spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
+	dev_priv->irq_handler[status_bit] = handler;
+	spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
+}
+
+void
+nouveau_irq_unregister(struct drm_device *dev, int status_bit)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	unsigned long flags;
+
+	spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
+	dev_priv->irq_handler[status_bit] = NULL;
+	spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
+}