From: Duc Dang <dhdang@apm.com>
Date: Thu, 9 Jul 2015 21:20:12 +0000 (-0700)
Subject: PCI: xgene: Add support for a 64-bit prefetchable memory window
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8ef54f27f6f425fa8deedc237d99b9daf41d68d2;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

PCI: xgene: Add support for a 64-bit prefetchable memory window

X-Gene PCIe controller has registers to support multiple memory ranges.

Add support for a 64-bit prefetchable memory window.

[bhelgaas: changelog]
Signed-off-by: Duc Dang <dhdang@apm.com>
Signed-off-by: Tanmay Inamdar <tinamdar@apm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---

diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index a9dfb70d623a..55fe86548d77 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
@@ -321,8 +321,16 @@ static int xgene_pcie_map_ranges(struct xgene_pcie_port *port,
 				return ret;
 			break;
 		case IORESOURCE_MEM:
-			xgene_pcie_setup_ob_reg(port, res, OMR1BARL, res->start,
-						res->start - window->offset);
+			if (res->flags & IORESOURCE_PREFETCH)
+				xgene_pcie_setup_ob_reg(port, res, OMR2BARL,
+							res->start,
+							res->start -
+							window->offset);
+			else
+				xgene_pcie_setup_ob_reg(port, res, OMR1BARL,
+							res->start,
+							res->start -
+							window->offset);
 			break;
 		case IORESOURCE_BUS:
 			break;