From: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Date: Sat, 13 Sep 2014 15:47:22 +0000 (+0900)
Subject: ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8be6a6d04ceae15de160ca4cbc0915baaee801e4;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards

The downstream ChromeOS 3.8 kernel sets the clock frequency
for the I2C bus 7 at 400kHz. Do the same change in mainline.

Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index b8fea56b16a0..f24770937ec0 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -489,6 +489,7 @@
 
 &hsi2c_7 {
 	status = "okay";
+	clock-frequency = <400000>;
 
 	max98090: codec@10 {
 		compatible = "maxim,max98090";
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 17537f0ab44a..88b354452d2f 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -487,6 +487,7 @@
 
 &hsi2c_7 {
 	status = "okay";
+	clock-frequency = <400000>;
 
 	max98091: codec@10 {
 		compatible = "maxim,max98091";