From: James Hogan Date: Wed, 13 Jul 2016 13:12:49 +0000 (+0100) Subject: MIPS: c-r4k: Avoid dcache flush for sigtramps X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8bd646e92bad56a2931ff7442aba84afc1848e66;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git MIPS: c-r4k: Avoid dcache flush for sigtramps Avoid the dcache and scache flush in local_r4k_flush_cache_sigtramp() if the icache fills straight from the dcache. Signed-off-by: James Hogan Cc: Paul Burton Cc: Leonid Yegoshin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13802/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 600b0ad48319..58b810e67bba 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -841,12 +841,16 @@ static void local_r4k_flush_cache_sigtramp(void *args) } R4600_HIT_CACHEOP_WAR_IMPL; - if (dc_lsize) - vaddr ? flush_dcache_line(addr & ~(dc_lsize - 1)) - : protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); - if (!cpu_icache_snoops_remote_store && scache_size) - vaddr ? flush_scache_line(addr & ~(sc_lsize - 1)) - : protected_writeback_scache_line(addr & ~(sc_lsize - 1)); + if (!cpu_has_ic_fills_f_dc) { + if (dc_lsize) + vaddr ? flush_dcache_line(addr & ~(dc_lsize - 1)) + : protected_writeback_dcache_line( + addr & ~(dc_lsize - 1)); + if (!cpu_icache_snoops_remote_store && scache_size) + vaddr ? flush_scache_line(addr & ~(sc_lsize - 1)) + : protected_writeback_scache_line( + addr & ~(sc_lsize - 1)); + } if (ic_lsize) vaddr ? flush_icache_line(addr & ~(ic_lsize - 1)) : protected_flush_icache_line(addr & ~(ic_lsize - 1));