From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Wed, 22 Apr 2015 16:24:55 +0000 (-0700)
Subject: Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8b3c8ba3d8c2680dab5363a80c024965cac08b1e;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge tag 'armsoc-late' of git://git./linux/kernel/git/arm/arm-soc

Pull ARM SoC late changes from Olof Johansson:
 "We were expecting to sit on this branch through most of the merge
  window since the contents was merged into our tree late, but we ended
  up sitting on all of our contents so it can go in with the rest.

  The contents here is:

   - a large branch of cleanups of the CM/PRM blocks on OMAP.

   - a couple of patches plumbing up CM/PRM on OMAP5 and DRA7.

   - a branch with DT updates for Freescale i.MX.  including some
     shuffling from .dts to .dtsi (include) files that causes a little
     churn"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits)
  ARM: OMAP2+: Fix booting with configs that don't have MFD_SYSCON
  ARM: OMAP4+: control: add support for initializing control module via DT
  ARM: dts: dra7: add minimal l4 bus layout with control module support
  ARM: dts: omap5: add minimal l4 bus layout with control module support
  ARM: OMAP4+: control: remove support for legacy pad read/write
  ARM: OMAP4: display: convert display to use syscon for dsi muxing
  ARM: dts: omap4: add minimal l4 bus layout with control module support
  ARM: dts: am4372: add minimal l4 bus layout with control module support
  ARM: dts: am43xx-epos-evm: fix pinmux node layout
  ARM: dts: am33xx: add minimal l4 bus layout with control module support
  ARM: dts: omap3: add minimal l4 bus layout with control module support
  ARM: dts: omap24xx: add minimal l4 bus layout with control module support
  ARM: OMAP2+: control: add syscon support for register accesses
  ARM: OMAP2+: id: cache omap_type value
  ARM: OMAP2+: control: remove API for getting control module base address
  ARM: OMAP2+: clock: add low-level support for regmap
  ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init
  ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags
  ARM: OMAP2+: CM: move SoC specific init calls within a generic API
  ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility
  ...
---

8b3c8ba3d8c2680dab5363a80c024965cac08b1e
diff --cc arch/arm/boot/dts/dra7.dtsi
index 082882c616e8,a3c32e8ee90f..5332b57b4950
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@@ -99,20 -91,104 +99,104 @@@
  		ti,hwmods = "l3_main_1", "l3_main_2";
  		reg = <0x44000000 0x1000000>,
  		      <0x45000000 0x1000>;
 -		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 -			     <GIC_SPI DIRECT_IRQ(10) IRQ_TYPE_LEVEL_HIGH>;
 +		interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 +				      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  
- 		prm: prm@4ae06000 {
- 			compatible = "ti,dra7-prm";
- 			reg = <0x4ae06000 0x3000>;
- 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ 		l4_cfg: l4@4a000000 {
+ 			compatible = "ti,dra7-l4-cfg", "simple-bus";
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 			ranges = <0 0x4a000000 0x22c000>;
  
- 			prm_clocks: clocks {
+ 			scm: scm@2000 {
+ 				compatible = "ti,dra7-scm-core", "simple-bus";
+ 				reg = <0x2000 0x2000>;
  				#address-cells = <1>;
- 				#size-cells = <0>;
+ 				#size-cells = <1>;
+ 				ranges = <0 0x2000 0x2000>;
+ 
+ 				scm_conf: scm_conf@0 {
+ 					compatible = "syscon";
+ 					reg = <0x0 0x1400>;
+ 					#address-cells = <1>;
+ 					#size-cells = <1>;
+ 
+ 					pbias_regulator: pbias_regulator {
+ 						compatible = "ti,pbias-omap";
+ 						reg = <0xe00 0x4>;
+ 						syscon = <&scm_conf>;
+ 						pbias_mmc_reg: pbias_mmc_omap5 {
+ 							regulator-name = "pbias_mmc_omap5";
+ 							regulator-min-microvolt = <1800000>;
+ 							regulator-max-microvolt = <3000000>;
+ 						};
+ 					};
+ 				};
+ 
+ 				dra7_pmx_core: pinmux@1400 {
+ 					compatible = "ti,dra7-padconf",
+ 						     "pinctrl-single";
+ 					reg = <0x1400 0x0464>;
+ 					#address-cells = <1>;
+ 					#size-cells = <0>;
+ 					#interrupt-cells = <1>;
+ 					interrupt-controller;
+ 					pinctrl-single,register-width = <32>;
+ 					pinctrl-single,function-mask = <0x3fffffff>;
+ 				};
+ 			};
+ 
+ 			cm_core_aon: cm_core_aon@5000 {
+ 				compatible = "ti,dra7-cm-core-aon";
+ 				reg = <0x5000 0x2000>;
+ 
+ 				cm_core_aon_clocks: clocks {
+ 					#address-cells = <1>;
+ 					#size-cells = <0>;
+ 				};
+ 
+ 				cm_core_aon_clockdomains: clockdomains {
+ 				};
  			};
  
- 			prm_clockdomains: clockdomains {
+ 			cm_core: cm_core@8000 {
+ 				compatible = "ti,dra7-cm-core";
+ 				reg = <0x8000 0x3000>;
+ 
+ 				cm_core_clocks: clocks {
+ 					#address-cells = <1>;
+ 					#size-cells = <0>;
+ 				};
+ 
+ 				cm_core_clockdomains: clockdomains {
+ 				};
+ 			};
+ 		};
+ 
+ 		l4_wkup: l4@4ae00000 {
+ 			compatible = "ti,dra7-l4-wkup", "simple-bus";
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 			ranges = <0 0x4ae00000 0x3f000>;
+ 
+ 			counter32k: counter@4000 {
+ 				compatible = "ti,omap-counter32k";
+ 				reg = <0x4000 0x40>;
+ 				ti,hwmods = "counter_32k";
+ 			};
+ 
+ 			prm: prm@6000 {
+ 				compatible = "ti,dra7-prm";
+ 				reg = <0x6000 0x3000>;
+ 				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ 
+ 				prm_clocks: clocks {
+ 					#address-cells = <1>;
+ 					#size-cells = <0>;
+ 				};
+ 
+ 				prm_clockdomains: clockdomains {
+ 				};
  			};
  		};