From: Matt Carlson Date: Sun, 21 Oct 2007 23:17:55 +0000 (-0700) Subject: [TG3]: PCI command adjustment X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8a6eac90e21633e054e17d21454a2c26824aeb18;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git [TG3]: PCI command adjustment This patch changes the way the driver works with the PCI command register. It adjusts the access size from dwords to words. This patch is done both as a PCI configuration space cleanup and as preparatory work for PCI error recovery. Signed-off-by: Matt Carlson Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 98f465828110..328eb4adc10b 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -5029,10 +5029,7 @@ static int tg3_poll_fw(struct tg3 *tp) /* Save PCI command register before chip reset */ static void tg3_save_pci_state(struct tg3 *tp) { - u32 val; - - pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val); - tp->pci_cmd = val; + pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd); } /* Restore PCI state after chip reset */ @@ -5055,7 +5052,7 @@ static void tg3_restore_pci_state(struct tg3 *tp) PCISTATE_ALLOW_APE_SHMEM_WR; pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); - pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd); + pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) { pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 495a1dfaba5a..1d5b2a3dd29d 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -2421,7 +2421,7 @@ struct tg3 { #define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */ u32 led_ctrl; - u32 pci_cmd; + u16 pci_cmd; char board_part_number[24]; #define TG3_VER_SIZE 32