From: David Gibson Date: Wed, 27 Jul 2005 05:47:23 +0000 (+1000) Subject: [PATCH] Remove nested feature sections X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=8913ca1c9ccb5eb6471afd419159729eef6e2730;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [PATCH] Remove nested feature sections The {BEGIN,END}_FTR_SECTION asm macros used in ppc64 to nop out sections of code at runtime cannot be nested. However, we do nest them in hash_low.S. We get away with it there, because there is nothing between the BEGIN markers for each section. However, that's confusing to someone reading the code. This patch removes the nested ifset and ifclr feature sections, replacing them with a single feature section in the full mask/value form. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- diff --git a/arch/ppc64/mm/hash_low.S b/arch/ppc64/mm/hash_low.S index fbff24827ae7..35eb49e1b890 100644 --- a/arch/ppc64/mm/hash_low.S +++ b/arch/ppc64/mm/hash_low.S @@ -128,13 +128,11 @@ _GLOBAL(__hash_page) /* We eventually do the icache sync here (maybe inline that * code rather than call a C function...) */ -BEGIN_FTR_SECTION BEGIN_FTR_SECTION mr r4,r30 mr r5,r7 bl .hash_page_do_lazy_icache -END_FTR_SECTION_IFSET(CPU_FTR_NOEXECUTE) -END_FTR_SECTION_IFCLR(CPU_FTR_COHERENT_ICACHE) +END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE) /* At this point, r3 contains new PP bits, save them in * place of "access" in the param area (sic)