From: Philipp Zabel Date: Mon, 2 Jul 2012 10:03:43 +0000 (-0300) Subject: [media] media: coda: firmware loading for 64-bit AXI bus width X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=87048bb465950685f807fc5922ceeec689755f9c;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [media] media: coda: firmware loading for 64-bit AXI bus width Add support for loading a raw firmware with 16-bit chars ordered in little-endian 64-bit words, corresponding to the memory access pattern of CODA7 and above: When writing the boot code into the code download register, the chars have to be reordered back. Signed-off-by: Philipp Zabel Tested-by: Javier Martin Signed-off-by: Mauro Carvalho Chehab --- diff --git a/drivers/media/platform/coda.c b/drivers/media/platform/coda.c index 3383e16701fc..883e658b364b 100644 --- a/drivers/media/platform/coda.c +++ b/drivers/media/platform/coda.c @@ -1513,7 +1513,7 @@ static char *coda_product_name(int product) } } -static int coda_hw_init(struct coda_dev *dev, const struct firmware *fw) +static int coda_hw_init(struct coda_dev *dev) { u16 product, major, minor, release; u32 data; @@ -1523,21 +1523,27 @@ static int coda_hw_init(struct coda_dev *dev, const struct firmware *fw) clk_prepare_enable(dev->clk_per); clk_prepare_enable(dev->clk_ahb); - /* Copy the whole firmware image to the code buffer */ - memcpy(dev->codebuf.vaddr, fw->data, fw->size); /* * Copy the first CODA_ISRAM_SIZE in the internal SRAM. - * This memory seems to be big-endian here, which is weird, since - * the internal ARM processor of the coda is little endian. + * The 16-bit chars in the code buffer are in memory access + * order, re-sort them to CODA order for register download. * Data in this SRAM survives a reboot. */ - p = (u16 *)fw->data; - for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) { - data = CODA_DOWN_ADDRESS_SET(i) | - CODA_DOWN_DATA_SET(p[i ^ 1]); - coda_write(dev, data, CODA_REG_BIT_CODE_DOWN); + p = (u16 *)dev->codebuf.vaddr; + if (dev->devtype->product == CODA_DX6) { + for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) { + data = CODA_DOWN_ADDRESS_SET(i) | + CODA_DOWN_DATA_SET(p[i ^ 1]); + coda_write(dev, data, CODA_REG_BIT_CODE_DOWN); + } + } else { + for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) { + data = CODA_DOWN_ADDRESS_SET(i) | + CODA_DOWN_DATA_SET(p[round_down(i, 4) + + 3 - (i % 4)]); + coda_write(dev, data, CODA_REG_BIT_CODE_DOWN); + } } - release_firmware(fw); /* Tell the BIT where to find everything it needs */ coda_write(dev, dev->workbuf.paddr, @@ -1633,7 +1639,11 @@ static void coda_fw_callback(const struct firmware *fw, void *context) return; } - ret = coda_hw_init(dev, fw); + /* Copy the whole firmware image to the code buffer */ + memcpy(dev->codebuf.vaddr, fw->data, fw->size); + release_firmware(fw); + + ret = coda_hw_init(dev); if (ret) { v4l2_err(&dev->v4l2_dev, "HW initialization failed\n"); return;