From: Martin Schwidefsky Date: Thu, 26 Mar 2009 14:24:44 +0000 (+0100) Subject: [S390] cleanup lowcore.h X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=866ba28418d30122d863c50182a202741f4dcf3e;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git [S390] cleanup lowcore.h The lowcore.h header has quite a lot of whitespace damage and a rather wild collection of entries. Remove all that whitespace and tidy up the order of the lowcore fields. Signed-off-by: Martin Schwidefsky --- diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h index 5b18035c1dc7..b349f1c7fdfa 100644 --- a/arch/s390/include/asm/lowcore.h +++ b/arch/s390/include/asm/lowcore.h @@ -11,125 +11,118 @@ #ifndef _ASM_S390_LOWCORE_H #define _ASM_S390_LOWCORE_H -#ifndef __s390x__ -#define __LC_EXT_OLD_PSW 0x018 -#define __LC_SVC_OLD_PSW 0x020 -#define __LC_PGM_OLD_PSW 0x028 -#define __LC_MCK_OLD_PSW 0x030 -#define __LC_IO_OLD_PSW 0x038 -#define __LC_EXT_NEW_PSW 0x058 -#define __LC_SVC_NEW_PSW 0x060 -#define __LC_PGM_NEW_PSW 0x068 -#define __LC_MCK_NEW_PSW 0x070 -#define __LC_IO_NEW_PSW 0x078 -#else /* !__s390x__ */ -#define __LC_EXT_OLD_PSW 0x0130 -#define __LC_SVC_OLD_PSW 0x0140 -#define __LC_PGM_OLD_PSW 0x0150 -#define __LC_MCK_OLD_PSW 0x0160 -#define __LC_IO_OLD_PSW 0x0170 -#define __LC_EXT_NEW_PSW 0x01b0 -#define __LC_SVC_NEW_PSW 0x01c0 -#define __LC_PGM_NEW_PSW 0x01d0 -#define __LC_MCK_NEW_PSW 0x01e0 -#define __LC_IO_NEW_PSW 0x01f0 -#endif /* !__s390x__ */ - -#define __LC_IPL_PARMBLOCK_PTR 0x014 -#define __LC_EXT_PARAMS 0x080 -#define __LC_CPU_ADDRESS 0x084 -#define __LC_EXT_INT_CODE 0x086 - -#define __LC_SVC_ILC 0x088 -#define __LC_SVC_INT_CODE 0x08A -#define __LC_PGM_ILC 0x08C -#define __LC_PGM_INT_CODE 0x08E +#define __LC_IPL_PARMBLOCK_PTR 0x0014 +#define __LC_EXT_PARAMS 0x0080 +#define __LC_CPU_ADDRESS 0x0084 +#define __LC_EXT_INT_CODE 0x0086 -#define __LC_PER_ATMID 0x096 -#define __LC_PER_ADDRESS 0x098 -#define __LC_PER_ACCESS_ID 0x0A1 -#define __LC_AR_MODE_ID 0x0A3 +#define __LC_SVC_ILC 0x0088 +#define __LC_SVC_INT_CODE 0x008a +#define __LC_PGM_ILC 0x008c +#define __LC_PGM_INT_CODE 0x008e -#define __LC_SUBCHANNEL_ID 0x0B8 -#define __LC_SUBCHANNEL_NR 0x0BA -#define __LC_IO_INT_PARM 0x0BC -#define __LC_IO_INT_WORD 0x0C0 -#define __LC_MCCK_CODE 0x0E8 +#define __LC_PER_ATMID 0x0096 +#define __LC_PER_ADDRESS 0x0098 +#define __LC_PER_ACCESS_ID 0x00a1 +#define __LC_AR_MODE_ID 0x00a3 -#define __LC_LAST_BREAK 0x110 +#define __LC_SUBCHANNEL_ID 0x00b8 +#define __LC_SUBCHANNEL_NR 0x00ba +#define __LC_IO_INT_PARM 0x00bc +#define __LC_IO_INT_WORD 0x00c0 +#define __LC_MCCK_CODE 0x00e8 -#define __LC_RETURN_PSW 0x200 - -#define __LC_SAVE_AREA 0xC00 +#define __LC_DUMP_REIPL 0x0e00 #ifndef __s390x__ -#define __LC_IRB 0x208 -#define __LC_SYNC_ENTER_TIMER 0x248 -#define __LC_ASYNC_ENTER_TIMER 0x250 -#define __LC_EXIT_TIMER 0x258 -#define __LC_USER_TIMER 0x260 -#define __LC_SYSTEM_TIMER 0x268 -#define __LC_STEAL_TIMER 0x270 -#define __LC_LAST_UPDATE_TIMER 0x278 -#define __LC_LAST_UPDATE_CLOCK 0x280 -#define __LC_RETURN_MCCK_PSW 0x288 -#define __LC_KERNEL_STACK 0xC40 -#define __LC_THREAD_INFO 0xC44 -#define __LC_ASYNC_STACK 0xC48 -#define __LC_KERNEL_ASCE 0xC4C -#define __LC_USER_ASCE 0xC50 -#define __LC_PANIC_STACK 0xC54 -#define __LC_CPUID 0xC60 -#define __LC_CURRENT 0xC90 -#define __LC_INT_CLOCK 0xC98 +#define __LC_EXT_OLD_PSW 0x0018 +#define __LC_SVC_OLD_PSW 0x0020 +#define __LC_PGM_OLD_PSW 0x0028 +#define __LC_MCK_OLD_PSW 0x0030 +#define __LC_IO_OLD_PSW 0x0038 +#define __LC_EXT_NEW_PSW 0x0058 +#define __LC_SVC_NEW_PSW 0x0060 +#define __LC_PGM_NEW_PSW 0x0068 +#define __LC_MCK_NEW_PSW 0x0070 +#define __LC_IO_NEW_PSW 0x0078 +#define __LC_SAVE_AREA 0x0200 +#define __LC_RETURN_PSW 0x0240 +#define __LC_RETURN_MCCK_PSW 0x0248 +#define __LC_SYNC_ENTER_TIMER 0x0250 +#define __LC_ASYNC_ENTER_TIMER 0x0258 +#define __LC_EXIT_TIMER 0x0260 +#define __LC_USER_TIMER 0x0268 +#define __LC_SYSTEM_TIMER 0x0270 +#define __LC_STEAL_TIMER 0x0278 +#define __LC_LAST_UPDATE_TIMER 0x0280 +#define __LC_LAST_UPDATE_CLOCK 0x0288 +#define __LC_CURRENT 0x0290 +#define __LC_THREAD_INFO 0x0294 +#define __LC_KERNEL_STACK 0x0298 +#define __LC_ASYNC_STACK 0x029c +#define __LC_PANIC_STACK 0x02a0 +#define __LC_KERNEL_ASCE 0x02a4 +#define __LC_USER_ASCE 0x02a8 +#define __LC_USER_EXEC_ASCE 0x02ac +#define __LC_CPUID 0x02b0 +#define __LC_INT_CLOCK 0x02c8 +#define __LC_IRB 0x0300 +#define __LC_PFAULT_INTPARM 0x0080 +#define __LC_CPU_TIMER_SAVE_AREA 0x00d8 +#define __LC_CLOCK_COMP_SAVE_AREA 0x00e0 +#define __LC_PSW_SAVE_AREA 0x0100 +#define __LC_PREFIX_SAVE_AREA 0x0108 +#define __LC_AREGS_SAVE_AREA 0x0120 +#define __LC_FPREGS_SAVE_AREA 0x0160 +#define __LC_GPREGS_SAVE_AREA 0x0180 +#define __LC_CREGS_SAVE_AREA 0x01c0 #else /* __s390x__ */ -#define __LC_IRB 0x210 -#define __LC_SYNC_ENTER_TIMER 0x250 -#define __LC_ASYNC_ENTER_TIMER 0x258 -#define __LC_EXIT_TIMER 0x260 -#define __LC_USER_TIMER 0x268 -#define __LC_SYSTEM_TIMER 0x270 -#define __LC_STEAL_TIMER 0x278 -#define __LC_LAST_UPDATE_TIMER 0x280 -#define __LC_LAST_UPDATE_CLOCK 0x288 -#define __LC_RETURN_MCCK_PSW 0x290 -#define __LC_KERNEL_STACK 0xD40 -#define __LC_THREAD_INFO 0xD48 -#define __LC_ASYNC_STACK 0xD50 -#define __LC_KERNEL_ASCE 0xD58 -#define __LC_USER_ASCE 0xD60 -#define __LC_PANIC_STACK 0xD68 -#define __LC_CPUID 0xD80 -#define __LC_CURRENT 0xDD8 -#define __LC_INT_CLOCK 0xDE8 -#define __LC_VDSO_PER_CPU 0xE38 -#endif /* __s390x__ */ - -#define __LC_PASTE 0xE40 - -#define __LC_DUMP_REIPL 0xE00 -#ifndef __s390x__ -#define __LC_PFAULT_INTPARM 0x080 -#define __LC_CPU_TIMER_SAVE_AREA 0x0D8 -#define __LC_CLOCK_COMP_SAVE_AREA 0x0E0 -#define __LC_PSW_SAVE_AREA 0x100 -#define __LC_PREFIX_SAVE_AREA 0x108 -#define __LC_AREGS_SAVE_AREA 0x120 -#define __LC_FPREGS_SAVE_AREA 0x160 -#define __LC_GPREGS_SAVE_AREA 0x180 -#define __LC_CREGS_SAVE_AREA 0x1C0 -#else /* __s390x__ */ -#define __LC_PFAULT_INTPARM 0x11B8 +#define __LC_LAST_BREAK 0x0110 +#define __LC_EXT_OLD_PSW 0x0130 +#define __LC_SVC_OLD_PSW 0x0140 +#define __LC_PGM_OLD_PSW 0x0150 +#define __LC_MCK_OLD_PSW 0x0160 +#define __LC_IO_OLD_PSW 0x0170 +#define __LC_EXT_NEW_PSW 0x01b0 +#define __LC_SVC_NEW_PSW 0x01c0 +#define __LC_PGM_NEW_PSW 0x01d0 +#define __LC_MCK_NEW_PSW 0x01e0 +#define __LC_IO_NEW_PSW 0x01f0 +#define __LC_SAVE_AREA 0x0200 +#define __LC_RETURN_PSW 0x0280 +#define __LC_RETURN_MCCK_PSW 0x0290 +#define __LC_SYNC_ENTER_TIMER 0x02a0 +#define __LC_ASYNC_ENTER_TIMER 0x02a8 +#define __LC_EXIT_TIMER 0x02b0 +#define __LC_USER_TIMER 0x02b8 +#define __LC_SYSTEM_TIMER 0x02c0 +#define __LC_STEAL_TIMER 0x02c8 +#define __LC_LAST_UPDATE_TIMER 0x02d0 +#define __LC_LAST_UPDATE_CLOCK 0x02d8 +#define __LC_CURRENT 0x02e0 +#define __LC_THREAD_INFO 0x02e8 +#define __LC_KERNEL_STACK 0x02f0 +#define __LC_ASYNC_STACK 0x02f8 +#define __LC_PANIC_STACK 0x0300 +#define __LC_KERNEL_ASCE 0x0308 +#define __LC_USER_ASCE 0x0310 +#define __LC_USER_EXEC_ASCE 0x0318 +#define __LC_CPUID 0x0320 +#define __LC_INT_CLOCK 0x0340 +#define __LC_VDSO_PER_CPU 0x0350 +#define __LC_IRB 0x0380 +#define __LC_PASTE 0x03c0 +#define __LC_PFAULT_INTPARM 0x11b8 #define __LC_FPREGS_SAVE_AREA 0x1200 -#define __LC_GPREGS_SAVE_AREA 0x1280 +#define __LC_GPREGS_SAVE_AREA 0x1280 #define __LC_PSW_SAVE_AREA 0x1300 #define __LC_PREFIX_SAVE_AREA 0x1318 -#define __LC_FP_CREG_SAVE_AREA 0x131C +#define __LC_FP_CREG_SAVE_AREA 0x131c #define __LC_TODREG_SAVE_AREA 0x1324 -#define __LC_CPU_TIMER_SAVE_AREA 0x1328 +#define __LC_CPU_TIMER_SAVE_AREA 0x1328 #define __LC_CLOCK_COMP_SAVE_AREA 0x1331 -#define __LC_AREGS_SAVE_AREA 0x1340 -#define __LC_CREGS_SAVE_AREA 0x1380 +#define __LC_AREGS_SAVE_AREA 0x1340 +#define __LC_CREGS_SAVE_AREA 0x1380 #endif /* __s390x__ */ #ifndef __ASSEMBLY__ @@ -194,227 +187,240 @@ union save_area { struct _lowcore { #ifndef __s390x__ - /* prefix area: defined by architecture */ - psw_t restart_psw; /* 0x000 */ - __u32 ccw2[4]; /* 0x008 */ - psw_t external_old_psw; /* 0x018 */ - psw_t svc_old_psw; /* 0x020 */ - psw_t program_old_psw; /* 0x028 */ - psw_t mcck_old_psw; /* 0x030 */ - psw_t io_old_psw; /* 0x038 */ - __u8 pad1[0x58-0x40]; /* 0x040 */ - psw_t external_new_psw; /* 0x058 */ - psw_t svc_new_psw; /* 0x060 */ - psw_t program_new_psw; /* 0x068 */ - psw_t mcck_new_psw; /* 0x070 */ - psw_t io_new_psw; /* 0x078 */ - __u32 ext_params; /* 0x080 */ - __u16 cpu_addr; /* 0x084 */ - __u16 ext_int_code; /* 0x086 */ - __u16 svc_ilc; /* 0x088 */ - __u16 svc_code; /* 0x08a */ - __u16 pgm_ilc; /* 0x08c */ - __u16 pgm_code; /* 0x08e */ - __u32 trans_exc_code; /* 0x090 */ - __u16 mon_class_num; /* 0x094 */ - __u16 per_perc_atmid; /* 0x096 */ - __u32 per_address; /* 0x098 */ - __u32 monitor_code; /* 0x09c */ - __u8 exc_access_id; /* 0x0a0 */ - __u8 per_access_id; /* 0x0a1 */ - __u8 pad2[0xB8-0xA2]; /* 0x0a2 */ - __u16 subchannel_id; /* 0x0b8 */ - __u16 subchannel_nr; /* 0x0ba */ - __u32 io_int_parm; /* 0x0bc */ - __u32 io_int_word; /* 0x0c0 */ - __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ - __u32 stfl_fac_list; /* 0x0c8 */ - __u8 pad4[0xd4-0xcc]; /* 0x0cc */ - __u32 extended_save_area_addr; /* 0x0d4 */ - __u32 cpu_timer_save_area[2]; /* 0x0d8 */ - __u32 clock_comp_save_area[2]; /* 0x0e0 */ - __u32 mcck_interruption_code[2]; /* 0x0e8 */ - __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ - __u32 external_damage_code; /* 0x0f4 */ - __u32 failing_storage_address; /* 0x0f8 */ - __u8 pad6[0x100-0xfc]; /* 0x0fc */ - __u32 st_status_fixed_logout[4];/* 0x100 */ - __u8 pad7[0x120-0x110]; /* 0x110 */ - __u32 access_regs_save_area[16];/* 0x120 */ - __u32 floating_pt_save_area[8]; /* 0x160 */ - __u32 gpregs_save_area[16]; /* 0x180 */ - __u32 cregs_save_area[16]; /* 0x1c0 */ - - psw_t return_psw; /* 0x200 */ - __u8 irb[64]; /* 0x208 */ - __u64 sync_enter_timer; /* 0x248 */ - __u64 async_enter_timer; /* 0x250 */ - __u64 exit_timer; /* 0x258 */ - __u64 user_timer; /* 0x260 */ - __u64 system_timer; /* 0x268 */ - __u64 steal_timer; /* 0x270 */ - __u64 last_update_timer; /* 0x278 */ - __u64 last_update_clock; /* 0x280 */ - psw_t return_mcck_psw; /* 0x288 */ - __u8 pad8[0xc00-0x290]; /* 0x290 */ - - /* System info area */ - __u32 save_area[16]; /* 0xc00 */ - __u32 kernel_stack; /* 0xc40 */ - __u32 thread_info; /* 0xc44 */ - __u32 async_stack; /* 0xc48 */ - __u32 kernel_asce; /* 0xc4c */ - __u32 user_asce; /* 0xc50 */ - __u32 panic_stack; /* 0xc54 */ - __u32 user_exec_asce; /* 0xc58 */ - __u8 pad10[0xc60-0xc5c]; /* 0xc5c */ - /* entry.S sensitive area start */ - cpuid_t cpu_id; /* 0xc60 */ - __u32 cpu_nr; /* 0xc68 */ - __u8 pad_0xc6c[0xc80-0xc6c]; /* 0xc6c */ - /* entry.S sensitive area end */ - - /* SMP info area: defined by DJB */ - __u64 clock_comparator; /* 0xc80 */ - __u32 ext_call_fast; /* 0xc88 */ - __u32 percpu_offset; /* 0xc8c */ - __u32 current_task; /* 0xc90 */ - __u32 softirq_pending; /* 0xc94 */ - __u64 int_clock; /* 0xc98 */ - __u8 pad11[0xe00-0xca0]; /* 0xca0 */ - - /* 0xe00 contains the address of the IPL Parameter */ - /* Information block. Dump tools need IPIB for IPL */ - /* after dump. */ - __u32 ipib; /* 0xe00 */ - __u32 ipib_checksum; /* 0xe04 */ - - /* Align to the top 1k of prefix area */ - __u8 pad12[0x1000-0xe08]; /* 0xe08 */ + /* 0x0000 - 0x01ff: defined by architecture */ + psw_t restart_psw; /* 0x0000 */ + __u32 ccw2[4]; /* 0x0008 */ + psw_t external_old_psw; /* 0x0018 */ + psw_t svc_old_psw; /* 0x0020 */ + psw_t program_old_psw; /* 0x0028 */ + psw_t mcck_old_psw; /* 0x0030 */ + psw_t io_old_psw; /* 0x0038 */ + __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */ + psw_t external_new_psw; /* 0x0058 */ + psw_t svc_new_psw; /* 0x0060 */ + psw_t program_new_psw; /* 0x0068 */ + psw_t mcck_new_psw; /* 0x0070 */ + psw_t io_new_psw; /* 0x0078 */ + __u32 ext_params; /* 0x0080 */ + __u16 cpu_addr; /* 0x0084 */ + __u16 ext_int_code; /* 0x0086 */ + __u16 svc_ilc; /* 0x0088 */ + __u16 svc_code; /* 0x008a */ + __u16 pgm_ilc; /* 0x008c */ + __u16 pgm_code; /* 0x008e */ + __u32 trans_exc_code; /* 0x0090 */ + __u16 mon_class_num; /* 0x0094 */ + __u16 per_perc_atmid; /* 0x0096 */ + __u32 per_address; /* 0x0098 */ + __u32 monitor_code; /* 0x009c */ + __u8 exc_access_id; /* 0x00a0 */ + __u8 per_access_id; /* 0x00a1 */ + __u8 pad_0x00a2[0x00b8-0x00a2]; /* 0x00a2 */ + __u16 subchannel_id; /* 0x00b8 */ + __u16 subchannel_nr; /* 0x00ba */ + __u32 io_int_parm; /* 0x00bc */ + __u32 io_int_word; /* 0x00c0 */ + __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ + __u32 stfl_fac_list; /* 0x00c8 */ + __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */ + __u32 extended_save_area_addr; /* 0x00d4 */ + __u32 cpu_timer_save_area[2]; /* 0x00d8 */ + __u32 clock_comp_save_area[2]; /* 0x00e0 */ + __u32 mcck_interruption_code[2]; /* 0x00e8 */ + __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ + __u32 external_damage_code; /* 0x00f4 */ + __u32 failing_storage_address; /* 0x00f8 */ + __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */ + __u32 st_status_fixed_logout[4]; /* 0x0100 */ + __u8 pad_0x0110[0x0120-0x0110]; /* 0x0110 */ + + /* CPU register save area: defined by architecture */ + __u32 access_regs_save_area[16]; /* 0x0120 */ + __u32 floating_pt_save_area[8]; /* 0x0160 */ + __u32 gpregs_save_area[16]; /* 0x0180 */ + __u32 cregs_save_area[16]; /* 0x01c0 */ + + /* Return psws. */ + __u32 save_area[16]; /* 0x0200 */ + psw_t return_psw; /* 0x0240 */ + psw_t return_mcck_psw; /* 0x0248 */ + + /* CPU time accounting values */ + __u64 sync_enter_timer; /* 0x0250 */ + __u64 async_enter_timer; /* 0x0258 */ + __u64 exit_timer; /* 0x0260 */ + __u64 user_timer; /* 0x0268 */ + __u64 system_timer; /* 0x0270 */ + __u64 steal_timer; /* 0x0278 */ + __u64 last_update_timer; /* 0x0280 */ + __u64 last_update_clock; /* 0x0288 */ + + /* Current process. */ + __u32 current_task; /* 0x0290 */ + __u32 thread_info; /* 0x0294 */ + __u32 kernel_stack; /* 0x0298 */ + + /* Interrupt and panic stack. */ + __u32 async_stack; /* 0x029c */ + __u32 panic_stack; /* 0x02a0 */ + + /* Address space pointer. */ + __u32 kernel_asce; /* 0x02a4 */ + __u32 user_asce; /* 0x02a8 */ + __u32 user_exec_asce; /* 0x02ac */ + + /* SMP info area */ + cpuid_t cpu_id; /* 0x02b0 */ + __u32 cpu_nr; /* 0x02b8 */ + __u32 softirq_pending; /* 0x02bc */ + __u32 percpu_offset; /* 0x02c0 */ + __u32 ext_call_fast; /* 0x02c4 */ + __u64 int_clock; /* 0x02c8 */ + __u64 clock_comparator; /* 0x02d0 */ + __u8 pad_0x02d8[0x0300-0x02d8]; /* 0x02d8 */ + + /* Interrupt response block */ + __u8 irb[64]; /* 0x0300 */ + + __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */ + + /* + * 0xe00 contains the address of the IPL Parameter Information + * block. Dump tools need IPIB for IPL after dump. + * Note: do not change the position of any fields in 0x0e00-0x0f00 + */ + __u32 ipib; /* 0x0e00 */ + __u32 ipib_checksum; /* 0x0e04 */ + + /* Align to the top 1k of prefix area */ + __u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */ #else /* !__s390x__ */ - /* prefix area: defined by architecture */ - __u32 ccw1[2]; /* 0x000 */ - __u32 ccw2[4]; /* 0x008 */ - __u8 pad1[0x80-0x18]; /* 0x018 */ - __u32 ext_params; /* 0x080 */ - __u16 cpu_addr; /* 0x084 */ - __u16 ext_int_code; /* 0x086 */ - __u16 svc_ilc; /* 0x088 */ - __u16 svc_code; /* 0x08a */ - __u16 pgm_ilc; /* 0x08c */ - __u16 pgm_code; /* 0x08e */ - __u32 data_exc_code; /* 0x090 */ - __u16 mon_class_num; /* 0x094 */ - __u16 per_perc_atmid; /* 0x096 */ - addr_t per_address; /* 0x098 */ - __u8 exc_access_id; /* 0x0a0 */ - __u8 per_access_id; /* 0x0a1 */ - __u8 op_access_id; /* 0x0a2 */ - __u8 ar_access_id; /* 0x0a3 */ - __u8 pad2[0xA8-0xA4]; /* 0x0a4 */ - addr_t trans_exc_code; /* 0x0a8 */ - addr_t monitor_code; /* 0x0b0 */ - __u16 subchannel_id; /* 0x0b8 */ - __u16 subchannel_nr; /* 0x0ba */ - __u32 io_int_parm; /* 0x0bc */ - __u32 io_int_word; /* 0x0c0 */ - __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ - __u32 stfl_fac_list; /* 0x0c8 */ - __u8 pad4[0xe8-0xcc]; /* 0x0cc */ - __u32 mcck_interruption_code[2]; /* 0x0e8 */ - __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ - __u32 external_damage_code; /* 0x0f4 */ - addr_t failing_storage_address; /* 0x0f8 */ - __u8 pad6[0x120-0x100]; /* 0x100 */ - psw_t restart_old_psw; /* 0x120 */ - psw_t external_old_psw; /* 0x130 */ - psw_t svc_old_psw; /* 0x140 */ - psw_t program_old_psw; /* 0x150 */ - psw_t mcck_old_psw; /* 0x160 */ - psw_t io_old_psw; /* 0x170 */ - __u8 pad7[0x1a0-0x180]; /* 0x180 */ - psw_t restart_psw; /* 0x1a0 */ - psw_t external_new_psw; /* 0x1b0 */ - psw_t svc_new_psw; /* 0x1c0 */ - psw_t program_new_psw; /* 0x1d0 */ - psw_t mcck_new_psw; /* 0x1e0 */ - psw_t io_new_psw; /* 0x1f0 */ - psw_t return_psw; /* 0x200 */ - __u8 irb[64]; /* 0x210 */ - __u64 sync_enter_timer; /* 0x250 */ - __u64 async_enter_timer; /* 0x258 */ - __u64 exit_timer; /* 0x260 */ - __u64 user_timer; /* 0x268 */ - __u64 system_timer; /* 0x270 */ - __u64 steal_timer; /* 0x278 */ - __u64 last_update_timer; /* 0x280 */ - __u64 last_update_clock; /* 0x288 */ - psw_t return_mcck_psw; /* 0x290 */ - __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */ - /* System info area */ - __u64 save_area[16]; /* 0xc00 */ - __u8 pad9[0xd40-0xc80]; /* 0xc80 */ - __u64 kernel_stack; /* 0xd40 */ - __u64 thread_info; /* 0xd48 */ - __u64 async_stack; /* 0xd50 */ - __u64 kernel_asce; /* 0xd58 */ - __u64 user_asce; /* 0xd60 */ - __u64 panic_stack; /* 0xd68 */ - __u64 user_exec_asce; /* 0xd70 */ - __u8 pad10[0xd80-0xd78]; /* 0xd78 */ - /* entry.S sensitive area start */ - cpuid_t cpu_id; /* 0xd80 */ - __u32 cpu_nr; /* 0xd88 */ - __u8 pad_0xd8c[0xdc0-0xd8c]; /* 0xd8c */ - /* entry.S sensitive area end */ - - /* SMP info area: defined by DJB */ - __u64 clock_comparator; /* 0xdc0 */ - __u64 ext_call_fast; /* 0xdc8 */ - __u64 percpu_offset; /* 0xdd0 */ - __u64 current_task; /* 0xdd8 */ - __u32 softirq_pending; /* 0xde0 */ - __u32 pad_0x0de4; /* 0xde4 */ - __u64 int_clock; /* 0xde8 */ - __u8 pad12[0xe00-0xdf0]; /* 0xdf0 */ - - /* 0xe00 contains the address of the IPL Parameter */ - /* Information block. Dump tools need IPIB for IPL */ - /* after dump. */ - __u64 ipib; /* 0xe00 */ - __u32 ipib_checksum; /* 0xe08 */ + /* 0x0000 - 0x01ff: defined by architecture */ + __u32 ccw1[2]; /* 0x0000 */ + __u32 ccw2[4]; /* 0x0008 */ + __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ + __u32 ext_params; /* 0x0080 */ + __u16 cpu_addr; /* 0x0084 */ + __u16 ext_int_code; /* 0x0086 */ + __u16 svc_ilc; /* 0x0088 */ + __u16 svc_code; /* 0x008a */ + __u16 pgm_ilc; /* 0x008c */ + __u16 pgm_code; /* 0x008e */ + __u32 data_exc_code; /* 0x0090 */ + __u16 mon_class_num; /* 0x0094 */ + __u16 per_perc_atmid; /* 0x0096 */ + addr_t per_address; /* 0x0098 */ + __u8 exc_access_id; /* 0x00a0 */ + __u8 per_access_id; /* 0x00a1 */ + __u8 op_access_id; /* 0x00a2 */ + __u8 ar_access_id; /* 0x00a3 */ + __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ + addr_t trans_exc_code; /* 0x00a8 */ + addr_t monitor_code; /* 0x00b0 */ + __u16 subchannel_id; /* 0x00b8 */ + __u16 subchannel_nr; /* 0x00ba */ + __u32 io_int_parm; /* 0x00bc */ + __u32 io_int_word; /* 0x00c0 */ + __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ + __u32 stfl_fac_list; /* 0x00c8 */ + __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ + __u32 mcck_interruption_code[2]; /* 0x00e8 */ + __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ + __u32 external_damage_code; /* 0x00f4 */ + addr_t failing_storage_address; /* 0x00f8 */ + __u8 pad_0x0100[0x0120-0x0100]; /* 0x0100 */ + psw_t restart_old_psw; /* 0x0120 */ + psw_t external_old_psw; /* 0x0130 */ + psw_t svc_old_psw; /* 0x0140 */ + psw_t program_old_psw; /* 0x0150 */ + psw_t mcck_old_psw; /* 0x0160 */ + psw_t io_old_psw; /* 0x0170 */ + __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ + psw_t restart_psw; /* 0x01a0 */ + psw_t external_new_psw; /* 0x01b0 */ + psw_t svc_new_psw; /* 0x01c0 */ + psw_t program_new_psw; /* 0x01d0 */ + psw_t mcck_new_psw; /* 0x01e0 */ + psw_t io_new_psw; /* 0x01f0 */ + + /* Entry/exit save area & return psws. */ + __u64 save_area[16]; /* 0x0200 */ + psw_t return_psw; /* 0x0280 */ + psw_t return_mcck_psw; /* 0x0290 */ + + /* CPU accounting and timing values. */ + __u64 sync_enter_timer; /* 0x02a0 */ + __u64 async_enter_timer; /* 0x02a8 */ + __u64 exit_timer; /* 0x02b0 */ + __u64 user_timer; /* 0x02b8 */ + __u64 system_timer; /* 0x02c0 */ + __u64 steal_timer; /* 0x02c8 */ + __u64 last_update_timer; /* 0x02d0 */ + __u64 last_update_clock; /* 0x02d8 */ + + /* Current process. */ + __u64 current_task; /* 0x02e0 */ + __u64 thread_info; /* 0x02e8 */ + __u64 kernel_stack; /* 0x02f0 */ + + /* Interrupt and panic stack. */ + __u64 async_stack; /* 0x02f8 */ + __u64 panic_stack; /* 0x0300 */ + + /* Address space pointer. */ + __u64 kernel_asce; /* 0x0308 */ + __u64 user_asce; /* 0x0310 */ + __u64 user_exec_asce; /* 0x0318 */ + + /* SMP info area */ + cpuid_t cpu_id; /* 0x0320 */ + __u32 cpu_nr; /* 0x0328 */ + __u32 softirq_pending; /* 0x032c */ + __u64 percpu_offset; /* 0x0330 */ + __u64 ext_call_fast; /* 0x0338 */ + __u64 int_clock; /* 0x0340 */ + __u64 clock_comparator; /* 0x0348 */ + __u64 vdso_per_cpu_data; /* 0x0350 */ + __u8 pad_0x0358[0x0380-0x0358]; /* 0x0358 */ + + /* Interrupt response block. */ + __u8 irb[64]; /* 0x0380 */ /* Per cpu primary space access list */ - __u8 pad_0xe0c[0xe38-0xe0c]; /* 0xe0c */ - __u64 vdso_per_cpu_data; /* 0xe38 */ - __u32 paste[16]; /* 0xe40 */ - - __u8 pad13[0x11b8-0xe80]; /* 0xe80 */ - - /* 64 bit extparam used for pfault, diag 250 etc */ - __u64 ext_params2; /* 0x11B8 */ - - __u8 pad14[0x1200-0x11C0]; /* 0x11C0 */ - - /* System info area */ - - __u64 floating_pt_save_area[16]; /* 0x1200 */ - __u64 gpregs_save_area[16]; /* 0x1280 */ - __u32 st_status_fixed_logout[4]; /* 0x1300 */ - __u8 pad15[0x1318-0x1310]; /* 0x1310 */ - __u32 prefixreg_save_area; /* 0x1318 */ - __u32 fpt_creg_save_area; /* 0x131c */ - __u8 pad16[0x1324-0x1320]; /* 0x1320 */ - __u32 tod_progreg_save_area; /* 0x1324 */ - __u32 cpu_timer_save_area[2]; /* 0x1328 */ - __u32 clock_comp_save_area[2]; /* 0x1330 */ - __u8 pad17[0x1340-0x1338]; /* 0x1338 */ - __u32 access_regs_save_area[16]; /* 0x1340 */ - __u64 cregs_save_area[16]; /* 0x1380 */ + __u32 paste[16]; /* 0x03c0 */ + + __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */ + + /* + * 0xe00 contains the address of the IPL Parameter Information + * block. Dump tools need IPIB for IPL after dump. + * Note: do not change the position of any fields in 0x0e00-0x0f00 + */ + __u64 ipib; /* 0x0e00 */ + __u32 ipib_checksum; /* 0x0e08 */ + __u8 pad_0x0e0c[0x11b8-0x0e0c]; /* 0x0e0c */ + + /* 64 bit extparam used for pfault/diag 250: defined by architecture */ + __u64 ext_params2; /* 0x11B8 */ + __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ + + /* CPU register save area: defined by architecture */ + __u64 floating_pt_save_area[16]; /* 0x1200 */ + __u64 gpregs_save_area[16]; /* 0x1280 */ + __u32 st_status_fixed_logout[4]; /* 0x1300 */ + __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ + __u32 prefixreg_save_area; /* 0x1318 */ + __u32 fpt_creg_save_area; /* 0x131c */ + __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ + __u32 tod_progreg_save_area; /* 0x1324 */ + __u32 cpu_timer_save_area[2]; /* 0x1328 */ + __u32 clock_comp_save_area[2]; /* 0x1330 */ + __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */ + __u32 access_regs_save_area[16]; /* 0x1340 */ + __u64 cregs_save_area[16]; /* 0x1380 */ /* align to the top of the prefix area */ - - __u8 pad18[0x2000-0x1400]; /* 0x1400 */ + __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */ #endif /* !__s390x__ */ } __attribute__((packed)); /* End structure*/ diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S index ec7e35f6055b..1046c2c9f8d1 100644 --- a/arch/s390/kernel/head.S +++ b/arch/s390/kernel/head.S @@ -469,6 +469,8 @@ start: .org 0x10000 startup:basr %r13,0 # get base .LPG0: + xc 0x200(256),0x200 # partially clear lowcore + xc 0x300(256),0x300 #ifndef CONFIG_MARCH_G5 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}