From: Linus Torvalds Date: Tue, 9 May 2017 16:54:39 +0000 (-0700) Subject: Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc X-Git-Tag: MMI-PSA29.97-13-9~5641 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=85d604902eb28eaea4f9e0f3a655ae986fa4bd2e;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git Merge tag 'armsoc-dt' of git://git./linux/kernel/git/arm/arm-soc Pull ARM Device-tree updates from Olof Johansson: "Device-tree continues to see lots of updates. The majority of patches here are smaller changes for new hardware on existing platforms, and there are a few larger changes worth pointing out. Major new platforms: - Gemini has been ported to DT, so a handful of "new" platforms moved over from board files - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK - A bunch of embedded platforms, several Linksys platforms, Synology DS116, - Motorola Droid4 (really old OMAP-based phone) support is added. Some refactorings, i.e. Allwinner H3/H5 support is commonalized. And lots of smaller changes, cleanups, etc. See shortlog for more description We're adding ability to cross-include DT files between arm and arm64, by creating appropriate links in the dt-include directory, and using arm/ and arm64/ as include prefixes. This will avoid other local hacks such as per-file links between the two arch trees (this broke for external mirroring of DT contents). Now they can just provide their own appropriate dt-include hierarcy per platform" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits) ARM: dts: exynos: Use - instead of @ for DT OPP entries arm: spear6xx: add DT description of the ADC on SPEAr600 arm: spear6xx: remove unneeded pinctrl properties in spear600-evb arm: spear6xx: switch spear600-evb to the new flash partition DT binding arm: spear6xx: fix spaces in spear600-evb.dts arm: spear6xx: use node labels in spear600-evb.dts arm: spear6xx: add labels to various nodes in spear600.dtsi ARM: dts: vexpress: fix few unit address format warnings ARM: dts: at91: sama5d3_xplained: not all ADC channels are available ARM: dts: at91: sama5d3_xplained: fix ADC vref ARM: dts: at91: add envelope detector mux to the Axentia TSE-850 ARM: dts: armada-38x: label USB and SATA nodes ARM: dts: imx6q-utilite-pro: add hpd gpio ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply ARM: dts: imx6qdl-sabresd: Set LDO regulator supply ARM: dts: imx: add Gateworks Ventana GW5903 support ARM: dts: i.MX25: add AIPS control registers ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators ARM: dts: imx7-colibri: remove 1.8V fixed regulator ARM: dts: imx7-colibri: allow to disable Ethernet rail ... --- 85d604902eb28eaea4f9e0f3a655ae986fa4bd2e diff --cc arch/arm/boot/dts/r7s72100.dtsi index 1cf2bd038090,ab9ced453118..0423996e4dcc --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@@ -369,16 -394,13 +395,23 @@@ <0xe8202000 0x1000>; }; + L2: cache-controller@3ffff000 { + compatible = "arm,pl310-cache"; + reg = <0x3ffff000 0x1000>; + interrupts = ; + arm,early-bresp-disable; + arm,full-line-zero-disable; + cache-unified; + cache-level = <2>; + }; + + wdt: watchdog@fcfe0000 { + compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt"; + reg = <0xfcfe0000 0x6>; + interrupts = ; + clocks = <&p0_clk>; + }; + i2c0: i2c@fcfee000 { #address-cells = <1>; #size-cells = <0>; diff --cc arch/arm/boot/dts/rk3188.dtsi index 1aff4ad22fc4,fa1bdb8875ae..1399bc04ea77 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@@ -545,8 -529,7 +545,8 @@@ }; &global_timer { - interrupts = ; + interrupts = ; + status = "disabled"; }; &local_timer { diff --cc arch/arm/boot/dts/stm32746g-eval.dts index 0dc18a0f0940,b5207588bdcb..69a957963fa8 --- a/arch/arm/boot/dts/stm32746g-eval.dts +++ b/arch/arm/boot/dts/stm32746g-eval.dts @@@ -89,10 -89,10 +89,14 @@@ clock-frequency = <25000000>; }; +&crc { + status = "okay"; +}; + + &rtc { + status = "okay"; + }; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default"; diff --cc arch/arm/boot/dts/stm32f746.dtsi index 755fb923c07b,bd8406b02a57..c2765ce12e2e --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@@ -289,18 -328,14 +328,21 @@@ }; }; + crc: crc@40023000 { + compatible = "st,stm32f7-crc"; + reg = <0x40023000 0x400>; + clocks = <&rcc 0 12>; + status = "disabled"; + }; + rcc: rcc@40023800 { #clock-cells = <2>; - compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; + compatible = "st,stm32f746-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; - clocks = <&clk_hse>; + clocks = <&clk_hse>, <&clk_i2s_ckin>; + st,syscfg = <&pwrcfg>; + assigned-clocks = <&rcc 1 CLK_HSE_RTC>; + assigned-clock-rates = <1000000>; }; }; }; diff --cc arch/arm/boot/dts/sun8i-a23-a33.dtsi index 8a3ed21cb7bc,bd28f75b9579..a8b978d0f35b --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@@ -493,9 -492,10 +492,10 @@@ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; clock-names = "bus", "core"; resets = <&ccu RST_BUS_GPU>; + #cooling-cells = <2>; assigned-clocks = <&ccu CLK_GPU>; - assigned-clock-rates = <408000000>; + assigned-clock-rates = <384000000>; }; gic: interrupt-controller@01c81000 { diff --cc arch/arm/boot/dts/sun8i-a33.dtsi index 306af6cadf26,eeba172a0fb7..013978259372 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@@ -73,12 -134,9 +128,13 @@@ clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; + cpu@1 { + operating-points-v2 = <&cpu0_opp_table>; + }; + cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu";