From: Geert Uytterhoeven Date: Wed, 12 Mar 2014 18:44:49 +0000 (+0100) Subject: ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=835d737d664650d7f164a5b688271a424db4434c;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value The MD pins are sampled at reset time, hence the read value will always be the same, and we can avoid the overhead of ioremapping the register on every read. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 10604480f325..542c5a47173f 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -30,12 +30,16 @@ u32 rcar_gen2_read_mode_pins(void) { - void __iomem *modemr = ioremap_nocache(MODEMR, 4); - u32 mode; - - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); + static u32 mode; + static bool mode_valid; + + if (!mode_valid) { + void __iomem *modemr = ioremap_nocache(MODEMR, 4); + BUG_ON(!modemr); + mode = ioread32(modemr); + iounmap(modemr); + mode_valid = true; + } return mode; }