From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Date: Wed, 9 Mar 2016 08:47:20 +0000 (+0530)
Subject: spi: xilinx: Add devicetree binding for spi-xilinx
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=82b3aea65f9fee161d8e07602e5a8c7b0b103fa3;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

spi: xilinx: Add devicetree binding for spi-xilinx

Add a binding document for the spi/spi-xilinx

Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---

diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
new file mode 100644
index 000000000000..c7b7856bd528
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
@@ -0,0 +1,22 @@
+Xilinx SPI controller Device Tree Bindings
+-------------------------------------------------
+
+Required properties:
+- compatible		: Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b"
+- reg			: Physical base address and size of SPI registers map.
+- interrupts		: Property with a value describing the interrupt
+			  number.
+- interrupt-parent	: Must be core interrupt controller
+
+Optional properties:
+- xlnx,num-ss-bits	: Number of chip selects used.
+
+Example:
+	axi_quad_spi@41e00000 {
+			compatible = "xlnx,xps-spi-2.00.a";
+			interrupt-parent = <&intc>;
+			interrupts = <0 31 1>;
+			reg = <0x41e00000 0x10000>;
+			xlnx,num-ss-bits = <0x1>;
+	};
+