From: Hyunki Koo <hyunki00.koo@samsung.com>
Date: Thu, 4 Jan 2018 03:46:31 +0000 (+0900)
Subject: [COMMON] pinctrl: samsung : Add eint filter control register offset filed
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=811e22eb1b10f730d1797c0f4767bee77dd7acfa;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

[COMMON] pinctrl: samsung : Add eint filter control register offset filed

To support eint filter control setting, we should describe
enit FLTCON register offset in EXYNOS9_PIN_BANK_EINT macro.
With fltcon_offset, we can set FLTCON regiseter of each GPIO block.

Change-Id: I5754fbfba1f7bd89c8218c5329af1c91081fac77
Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com>
---

diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 26e8fab736f1..c5420f3b45aa 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -1022,6 +1022,7 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
 		bank->eint_type = bdata->eint_type;
 		bank->eint_mask = bdata->eint_mask;
 		bank->eint_offset = bdata->eint_offset;
+		bank->fltcon_offset = bdata->fltcon_offset;
 		bank->name = bdata->name;
 
 		spin_lock_init(&bank->slock);
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index ae932e0c05f2..102c9de55ed2 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -118,6 +118,7 @@ struct samsung_pin_bank_type {
  * @eint_type: type of the external interrupt supported by the bank.
  * @eint_mask: bit mask of pins which support EINT function.
  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
+ * @fltcon_offset: SoC-specific EINT filter control register offset of bank.
  * @name: name to be prefixed for each pin in this pin bank.
  */
 struct samsung_pin_bank_data {
@@ -129,6 +130,7 @@ struct samsung_pin_bank_data {
 	enum eint_type	eint_type;
 	u32		eint_mask;
 	u32		eint_offset;
+	u32		fltcon_offset;
 	const char	*name;
 };
 
@@ -143,6 +145,7 @@ struct samsung_pin_bank_data {
  * @eint_type: type of the external interrupt supported by the bank.
  * @eint_mask: bit mask of pins which support EINT function.
  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
+ * @fltcon_offset: SoC-specific EINT filter control register offset of bank.
  * @name: name to be prefixed for each pin in this pin bank.
  * @pin_base: starting pin number of the bank.
  * @soc_priv: per-bank private data for SoC-specific code.
@@ -165,6 +168,7 @@ struct samsung_pin_bank {
 	enum eint_type	eint_type;
 	u32		eint_mask;
 	u32		eint_offset;
+	u32		fltcon_offset;
 	const char	*name;
 
 	u32		pin_base;