From: Paul Burton Date: Sun, 13 Aug 2017 04:36:19 +0000 (-0700) Subject: irqchip: mips-gic: Remove gic_set_polarity() X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=80e5f9c9e295b08c5c588083a4ad35e1e5f78731;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git irqchip: mips-gic: Remove gic_set_polarity() Remove the gic_set_polarity() function in favour of using the new change_gic_pol() accessor function which provides equivalent functionality. Signed-off-by: Paul Burton Acked-by: Marc Zyngier Cc: Jason Cooper Cc: Thomas Gleixner Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17029/ Signed-off-by: Ralf Baechle --- diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 7eb998c61d1e..987289558024 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -92,13 +92,6 @@ static inline void gic_update_bits(unsigned int reg, unsigned long mask, gic_write(reg, regval); } -static inline void gic_set_polarity(unsigned int intr, unsigned int pol) -{ - gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_POLARITY) + - GIC_INTR_OFS(intr), 1ul << GIC_INTR_BIT(intr), - (unsigned long)pol << GIC_INTR_BIT(intr)); -} - static inline void gic_set_trigger(unsigned int intr, unsigned int trig) { gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_TRIGGER) + @@ -272,13 +265,13 @@ static int gic_set_type(struct irq_data *d, unsigned int type) spin_lock_irqsave(&gic_lock, flags); switch (type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_EDGE_FALLING: - gic_set_polarity(irq, GIC_POL_NEG); + change_gic_pol(irq, GIC_POL_FALLING_EDGE); gic_set_trigger(irq, GIC_TRIG_EDGE); gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE); is_edge = true; break; case IRQ_TYPE_EDGE_RISING: - gic_set_polarity(irq, GIC_POL_POS); + change_gic_pol(irq, GIC_POL_RISING_EDGE); gic_set_trigger(irq, GIC_TRIG_EDGE); gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE); is_edge = true; @@ -290,14 +283,14 @@ static int gic_set_type(struct irq_data *d, unsigned int type) is_edge = true; break; case IRQ_TYPE_LEVEL_LOW: - gic_set_polarity(irq, GIC_POL_NEG); + change_gic_pol(irq, GIC_POL_ACTIVE_LOW); gic_set_trigger(irq, GIC_TRIG_LEVEL); gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE); is_edge = false; break; case IRQ_TYPE_LEVEL_HIGH: default: - gic_set_polarity(irq, GIC_POL_POS); + change_gic_pol(irq, GIC_POL_ACTIVE_HIGH); gic_set_trigger(irq, GIC_TRIG_LEVEL); gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE); is_edge = false; @@ -464,7 +457,7 @@ static void __init gic_basic_init(void) /* Setup defaults */ for (i = 0; i < gic_shared_intrs; i++) { - gic_set_polarity(i, GIC_POL_POS); + change_gic_pol(i, GIC_POL_ACTIVE_HIGH); gic_set_trigger(i, GIC_TRIG_LEVEL); write_gic_rmask(BIT(i)); } diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h index 8160cc8b677d..960e49a64e7a 100644 --- a/include/linux/irqchip/mips-gic.h +++ b/include/linux/irqchip/mips-gic.h @@ -14,8 +14,6 @@ #define GIC_MAX_INTRS 256 /* Constants */ -#define GIC_POL_POS 1 -#define GIC_POL_NEG 0 #define GIC_TRIG_EDGE 1 #define GIC_TRIG_LEVEL 0 #define GIC_TRIG_DUAL_ENABLE 1 @@ -52,9 +50,6 @@ }) #define GIC_INTR_BIT(intr) ((intr) % (mips_cm_is64 ? 64 : 32)) -/* Polarity : Reset Value is always 0 */ -#define GIC_SH_SET_POLARITY_OFS 0x0100 - /* Triggering : Reset Value is always 0 */ #define GIC_SH_SET_TRIGGER_OFS 0x0180