From: Jesse Barnes Date: Mon, 3 Aug 2015 20:09:11 +0000 (-0700) Subject: drm/i915: disable_shared_pll doesn't work on pre-gen5 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=80aa93128653c5f2502053c0d9740b336d975667;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/i915: disable_shared_pll doesn't work on pre-gen5 Looks like commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6 Author: Maarten Lankhorst Date: Mon Jun 15 12:33:53 2015 +0200 drm/i915: Update less state during modeset. introduced the unconditional calling of disable_shared_dpll, but didn't fix up pre-gen5 to avoid the BUG_ON at the top of the function. So change the BUG_ON into a gen check (alternately we could move the BUG_ON until later, since we shouldn't have a pll struct here either, but this seems clearer to read). This fixes a crash on load on my x200s platform. Signed-off-by: Jesse Barnes Reviewed-by: Maarten Lankhorst Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f4ed4f13646c..9e4ced583ef0 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1936,7 +1936,9 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc) struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc); /* PCH only available on ILK+ */ - BUG_ON(INTEL_INFO(dev)->gen < 5); + if (INTEL_INFO(dev)->gen < 5) + return; + if (pll == NULL) return;