From: Chris Zhong Date: Mon, 20 Feb 2017 08:02:17 +0000 (+0800) Subject: dt-bindings: add rk3399 support for dw-mipi-rockchip X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=7fea5243d1ae912285b7caea81d756ff18f2bcaa;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git dt-bindings: add rk3399 support for dw-mipi-rockchip The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has additional phy config clock. Signed-off-by: Chris Zhong Acked-by: Rob Herring Signed-off-by: Sean Paul Link: http://patchwork.freedesktop.org/patch/msgid/1487577744-2855-2-git-send-email-zyw@rock-chips.com --- diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 1753f0cc6fad..0f825686be80 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -5,10 +5,12 @@ Required properties: - #address-cells: Should be <1>. - #size-cells: Should be <0>. - compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi". + "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi". - reg: Represent the physical address range of the controller. - interrupts: Represent the controller's interrupt to the CPU(s). - clocks, clock-names: Phandles to the controller's pll reference - clock(ref) and APB clock(pclk), as described in [1]. + clock(ref) and APB clock(pclk). For RK3399, a phy config clock + (phy_cfg) is additional required. As described in [1]. - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - ports: contain a port node with endpoint definitions as defined in [2]. For vopb,set the reg = <0> and set the reg = <1> for vopl.