From: Chuck Meade Date: Tue, 27 Mar 2007 14:46:10 +0000 (-0400) Subject: [POWERPC] qe: Fix QUICC Engine SDMA setup errors X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=7f013bc9d05825b19433bc0deb1f5f4d2103726e;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [POWERPC] qe: Fix QUICC Engine SDMA setup errors Correct the alignment of the internal buffer used by the QUICC Engine SDMA controller to 4Kbytes. Correct the shift direction in the logic that sets up the SDMR register for the QUICC Engine SDMA controller. Signed-off-by: Chuck Meade Signed-off-by: Kumar Gala --- diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index e3d71e083f35..43f6cc9d7ea0 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -251,13 +251,13 @@ static int qe_sdma_init(void) /* allocate 2 internal temporary buffers (512 bytes size each) for * the SDMA */ - sdma_buf_offset = qe_muram_alloc(512 * 2, 64); + sdma_buf_offset = qe_muram_alloc(512 * 2, 4096); if (IS_MURAM_ERR(sdma_buf_offset)) return -ENOMEM; out_be32(&sdma->sdebcr, sdma_buf_offset & QE_SDEBCR_BA_MASK); - out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | (0x1 >> - QE_SDMR_CEN_SHIFT))); + out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | + (0x1 << QE_SDMR_CEN_SHIFT))); return 0; }