From: Christian Lamparter Date: Mon, 15 Aug 2011 16:45:54 +0000 (+0200) Subject: carl9170: fix timekeeping for HW_COUNTER firmwares X-Git-Tag: MMI-PSA29.97-13-9~18194^2~254^2~251 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=7ccc83b0fc69d5b18602aa250c10be0d3ae920c6;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git carl9170: fix timekeeping for HW_COUNTER firmwares AR9170_PWR_REG_PLL_ADDAC is used to set the main clock divisor which affects the AHB/CPU speed. Because this would interfere with the firmware internal timekeeping, the function has to be moved into the firmware. Signed-off-by: Christian Lamparter Signed-off-by: John W. Linville --- diff --git a/drivers/net/wireless/ath/carl9170/carl9170.h b/drivers/net/wireless/ath/carl9170/carl9170.h index c5427a72a1e2..f7dbdaa74c63 100644 --- a/drivers/net/wireless/ath/carl9170/carl9170.h +++ b/drivers/net/wireless/ath/carl9170/carl9170.h @@ -282,6 +282,7 @@ struct ar9170 { bool rx_stream; bool tx_stream; bool rx_filter; + bool hw_counters; unsigned int mem_blocks; unsigned int mem_block_size; unsigned int rx_size; diff --git a/drivers/net/wireless/ath/carl9170/fw.c b/drivers/net/wireless/ath/carl9170/fw.c index 39ddea5794f7..f4cae1cccbff 100644 --- a/drivers/net/wireless/ath/carl9170/fw.c +++ b/drivers/net/wireless/ath/carl9170/fw.c @@ -266,6 +266,9 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len) FIF_PROMISC_IN_BSS; } + if (SUPP(CARL9170FW_HW_COUNTERS)) + ar->fw.hw_counters = true; + if (SUPP(CARL9170FW_WOL)) device_set_wakeup_enable(&ar->udev->dev, true); diff --git a/drivers/net/wireless/ath/carl9170/phy.c b/drivers/net/wireless/ath/carl9170/phy.c index aa147a9120b6..8635c5c8463c 100644 --- a/drivers/net/wireless/ath/carl9170/phy.c +++ b/drivers/net/wireless/ath/carl9170/phy.c @@ -578,11 +578,10 @@ static int carl9170_init_phy(struct ar9170 *ar, enum ieee80211_band band) if (err) return err; - /* XXX: remove magic! */ - if (is_2ghz) - err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5163); - else - err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5143); + if (!ar->fw.hw_counters) { + err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, + is_2ghz ? 0x5163 : 0x5143); + } return err; }