From: Paulo Zanoni Date: Tue, 14 Feb 2012 19:07:09 +0000 (-0200) Subject: drm/i915: add missing SDVO bits for interlaced modes on ILK X-Git-Tag: MMI-PSA29.97-13-9~16236^2~115^2~124 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=7c26e5c6edaec70f12984f7a3020864cc21e6fec;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git drm/i915: add missing SDVO bits for interlaced modes on ILK This was pointed by Jesse Barnes. The code now seems to follow the specification but I don't have an SDVO device to really test this. Signed-off-by: Paulo Zanoni Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5c62b788c258..52a06be1d98d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3365,6 +3365,7 @@ #define TRANS_INTERLACE_MASK (7<<21) #define TRANS_PROGRESSIVE (0<<21) #define TRANS_INTERLACED (3<<21) +#define TRANS_LEGACY_INTERLACED_ILK (2<<21) #define TRANS_8BPC (0<<5) #define TRANS_10BPC (1<<5) #define TRANS_6BPC (2<<5) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ba287cab45f0..a12159e53aef 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1267,6 +1267,7 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, { int reg; u32 val, pipeconf_val; + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; /* PCH only available on ILK+ */ BUG_ON(dev_priv->info->gen < 5); @@ -1293,7 +1294,11 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, val &= ~TRANS_INTERLACE_MASK; if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK) - val |= TRANS_INTERLACED; + if (HAS_PCH_IBX(dev_priv->dev) && + intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) + val |= TRANS_LEGACY_INTERLACED_ILK; + else + val |= TRANS_INTERLACED; else val |= TRANS_PROGRESSIVE;