From: Ville Syrjälä Date: Thu, 5 Dec 2013 13:51:30 +0000 (+0200) Subject: drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled X-Git-Tag: MMI-PSA29.97-13-9~12830^2~16^2~48 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=7b39a0b791a356d09dd2517ec04b1bf9cdced4ab;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled On ILK/SNB only LP0/1 watermarks can be enabled when sprites are enabled, and on ILK/SNB/IVB sprite scaling is limited to LP0 only. So we can avoid computing the extra levels we're never going to use. Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index dbd025a4f22f..b06076d8f386 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2643,6 +2643,14 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc, /* LP0 watermarks always use 1/2 DDB partitioning */ ilk_compute_wm_maximums(dev, 0, &config, INTEL_DDB_PART_1_2, &max); + /* ILK/SNB: LP2+ watermarks only w/o sprites */ + if (INTEL_INFO(dev)->gen <= 6 && params->spr.enabled) + max_level = 1; + + /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */ + if (params->spr.scaled) + max_level = 0; + for (level = 0; level <= max_level; level++) ilk_compute_wm_level(dev_priv, level, params, &pipe_wm->wm[level]);